Ayatallah Ahmed Gamal Kamal ElakhrasExpertise
Dataflow ArchitectureHigh-Level Synthesis
Ayatallah is a Ph.D. student in the Processor Architecture Laboratory, advised by Professor Paolo Ienne. Between October 2023 and March 2024, she did an internship at AMD in the Research and Advanced Development team, under the supervision of Dr. Kristof Denolf. She received a B.Sc. degree in Computer Engineering from the American University in Cairo, Egypt in 2020 and started her Ph.D. in the same year.Her research interests include dataflow architecture,
Giovanni De MicheliExpertise
Technologies de conception pour les systèmes intégrés, tels que la synthèse, le codesign de HW/SW et la conception de basse puissance. Technologies de conception des systèmes sur les plateformes hétérogènes comprenant les composants électriques, et biologiques.
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Consulter svp http://si2.epfl.ch/~demichel/
Enseignement et PhD A dirigé les thèses EPFL de Abhishek Garg, Mohamed Haykel Ben Jamaa, Francesco Zanini, Ciprian Seiculescu, Cristina Boero, Hu Xu, Andrea Cavallini, Shashi Kanth David Atienza AlonsoDavid Atienza Alonso is an associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures. Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
Marco MattavelliEnseignement et PhD A dirigé les thèses EPFL de Christophe Clerc, Ruohua Zhou, Beilu Shao, Christophe Lucarz, Richard Thavot, Ab Al Hadi Bin Ab Rahman, Endri Bezati, Simone Casale Brunet, Malgorzata Michalska, Ana Angelica Hernandez Lopez, Aurélien Bloch, Mustafa Besirli, Ünsal Öztürk A co-dirigé les thèses EPFL de Sylvain Aguirre Cours Systems and architectures for signal processing EE-555 Etude des composants essentiels eessentiels et des technologies des systèmes de traitements des signau
Maher KayalMaher Kayal received M.S. and Ph.D degrees in electrical engineering from the Ecole Polytechnique Fédérale de Lausanne (EPFL, Switzerland) in 1983 and 1989 respectively. He has been with the Electronics laboratories of the Ecole Polytechnique Fédérale de Lausanne (EPFL, Switzerland) since 1990, where he is currently a professor and director of the Energy Management and Sustainability" section. He has published many scientific papers, coauthor of three text books dedicated to mixed-mode CMOS design and he holds eleven patents. His technical contributions have been in the area of analog and Mixed-signal circuits design including highly linear and tunable sensors microsystems, signal processing and green energy management. Prizes and Honors : Electronics Letters journal Premium Award 2013, Outstanding Paper Award? IEEE Mixdes 2013 Basil Papadias paper Award, IEEE Powertech 2013 Best Paper Awards, Mixdes 2013 Best Paper Awards, ICCAS 2012 Outstanding Paper Award- IEEE Mixdes 2012. Poland Section IEEE ED Chapter special award in 2011. Credit Suisse Award for Best Teaching- 2009. The William M. Portnoy Award at the Energy Conversion Congress and Exposition , California Sept 2009. Best Paper Award - IEEE-Mixdes 2009. High Quality Paper - IEEE Power Tech Conference June 2009. Best Paper Award - IEEE-Mixdes 2007. Best Paper Award - IEEE-TTTC International Conference on Automation, Quality and Testing, Robotics - 2006. Best Application Specific Integrated Circuit at the International European Design and Test Conference ED&TC - 1997. Ascom Award for the Best Work in Telecommunication Fields 1990. Publications Books. Books: Methodology for the Digital Calibration of Analog Circuits and Systems, Marc Pastre & Maher Kayal. Springer Publisher- (ISBN 1-4020-4252-3)-2006. Structured Analog CMOS Design, Danica Stefanovic & Maher Kayal. Springer Publisher-(ISBN 978-1-4020-8572-7)-2008. Linear CMOS RF Amplifiers for Wireless Applications, Maher Kayal, Springer Publisher. (ISBN 978-90-481-9360-8)-2010. Coeditor of Microelectronics Education Kluwer Academic Publishers. (ISBN 1-4020-2072-4). -2004.
Jean-Michel SalleseEnseignement et PhD Doctorant·es actuel·les Marta Macaluso A dirigé les thèses EPFL de Luca Gautero, Fengda Sun, Frédéric Zanella, Lucian Barbut, Farzan Jazaeri, Camillo Stefanucci, Jacopo Bronuzzi, Georgi Gorine, Chiara Rossi, Viros Sriskaran, Arnout Devos, Gennaro Termo A co-dirigé les thèses EPFL de Louis Harik, Fabrizio Lo Conte, Maria-Alexandra Paun, Anurag Mangla, Pranav Vivek Kulkarni Cours Electronique EE-280 Présentation des principaux composants de base de l'électronique.Analyse
Aleksandra RadenovicEnseignement et PhD Doctorant·es actuel·les Helena Miljkovic, Akhil Sai Naidu, Karl Rufus Pang Yeo, Wei Guo, Eveline Simone Mayner, Nianduo Cai, Marianna Mitsioni A dirigé les thèses EPFL de Paolo Annibale, Camille Alice Raillon, Fabrizia Dutto, Arun Shivanandan, Metin Kayci, Jiandong Feng, Roman Bulushev, Michael Graf, Adrien Charles Descloux, Sebastian James Davis, Martina Lihter, Evgenii Glushkov, Vytautas Navikas, Arielle Louise Planchette, Michal Daniel Macha, Mukeshchand Thakur, Nathan Ronceray, Kha
Edouard BugnionEdouard Bugnion joined EPFL in 2012, where his focus is on datacenter systems. His areas of interest include operating systems, datacenter infrastructure (systems and networking), and computer architecture. Before joining EPFL, Edouard spent 18 years in the US, where he studied at Stanford and co-founded two startups: VMware and Nuova Systems (acquired by Cisco). At VMware from 1998 until 2005, he played many roles including CTO. At Nuova/Cisco from 2005 until 2011, he helped build the core engineering team and became the VP/CTO of Ciscos Server, Access, and Virtualization Technology Group, a group that brought to market Ciscos Unified Computing System (UCS) platform for virtualized datacenters. Prof. Bugnion is a Fellow of the ACM. Together with his colleagues, he received the ACM Software System Award for VMware 1.0 in 2009. His paper Disco: Running Commodity Operating Systems on Scalable Multiprocessors" received a Best Paper Award at SOSP '97 and was entered into the ACM SIGOPS Hall of Fame Award in 2008. At EPFL, he received the OSDI 2014 Best Paper Award for his work on the IX dataplane operating system
Claudio BruschiniClaudio Bruschini holds an MSc in high energy physics from the University of Genova and a PhD in Applied Sciences from the Vrije Universiteit Brussel (VUB). He started his career with INFN (Italy, 1993), in the WA92 CERN collaboration (particle physics), and then moved to CERN as a Fellow in the European GP-MIMD2 project, attached to the NA48 collaboration (particle physics, parallel programming, 1994-1995). He then started his close collaboration with EPFL, first in the DeTeC (Demining Technology Center) project (sensors for landmine detection/humanitarian demining, 1996-1997). After DeTeC's end, he started the first of a series of fruitful collaborations with the Vrije Universiteit Brussel (VUB) on humanitarian demining related R&D (1998). This was followed by the EUDEM survey project (The European Union in Humanitarian Demining, 1998), the EUDEM2 three year EC sponsored support measure (www.eudem.info, 2001-2004), and the DELVE support action (www.delve.vub.ac.be, 2007). In parallel he started working within the EPFL's AQUA group (Advanced Quantum Architectures, Edoardo Charbon), on topics as diverse as ultrasonic sensors for in-air application, optical 3D and high speed 2D sensing, sensor networks, or tracking/motion capture systems, in particular for the preparation of research projects. This culminated in the European MEGAFRAME (www.megaframe.eu, FP6, 2006-2010, SPAD arrays and related in-pixel time stamping electronics in deep submicron CMOS technology) and SPADnet (www.spadnet.eu, FP7, 2010-2014, networked SPAD arrays for Positron Emission Tomography) projects, coordinated by EPFL-AQUA. As from 2009 he also worked with Dario Floreano on the management of the CURVACE Curved Artificial Compound Eyes FP7 project (www.curvace.org), coordinated by EPFL-LIS. He was also active with CHUV (Lausanne University Hospital) within EndoTOFPET-US (endoscopic PET) as well as on a CTI project devoted to the development of a new hand-held standalone tool for tracer-guided medical procedures. In 2014 he had also the pleasure of joining the EPFL ICLAB of Christian Enz during its ramp-up phase, collaborating on device related topics (SNF GigaRadMOST) and biomedical R&D (NanoTera WiseSkin). Claudio is now fully with EPFL’s Advanced Quantum Architecture (AQUA). He has also been active as independent scientific consultant, under the label CBR Scientific Consulting, on the preparation of (European) R&D project proposals and the execution of individual studies, and worked in 2006 for a local start-up as operations manager and R&D advisor.... but this is another story. An unauthorized early biography is available at http://lami.epfl.ch/team/claudiob/... Pierre-André FarinePierre-André Farine received the Doctoral and Engineering Degrees in Microtechnology from University of Neuchâtel, Switzerland, respectively in 1984 and 1978, and the Engineering in Microtechnology from ETS Le Locle in 1974.
He was working 17 years for the Swiss watch industries (Swatch Group), including developments for high-tech products, such as pager watches, watches including integrated sensors such as pressure, compass, altimeter and temperature sensors for Tissot. He was also involved in prototypes developments for watches including GPS and cellular GSM phones.
Since 8 years, he is Professor in Electronics and Signal Processing at the Institute of Microtechnology IMT, University of Neuchâtel, Switzerland. Full professor at EPFL since January 1st, 2009, he works in the field of low-power integrated products for portable devices, including microelectronics for wireless telecommunications, UWB and GNSS systems. He is Head of the Electronics and Signal Processing Laboratory ESPLAB of the EPFL IMT-NE. His laboratory works also for video and audio compression algorithms and their implementation in low power integrated circuits.
Pierre VandergheynstPierre Vandergheynst received the M.S. degree in physics and the Ph.D. degree in mathematical physics from the Université catholique de Louvain, Louvain-la-Neuve, Belgium, in 1995 and 1998, respectively. From 1998 to 2001, he was a Postdoctoral Researcher with the Signal Processing Laboratory, Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland. He was Assistant Professor at EPFL (2002-2007), where he is now a Full Professor of Electrical Engineering and, by courtesy, of Computer and Communication Sciences. As of 2015, Prof. Vandergheynst serves as EPFL’s Vice-Provost for Education. His research focuses on harmonic analysis, sparse approximations and mathematical data processing in general with applications covering signal, image and high dimensional data processing, computer vision, machine learning, data science and graph-based data processing. He was co-Editor-in-Chief of Signal Processing (2002-2006), Associate Editor of the IEEE Transactions on Signal Processing (2007-2011), the flagship journal of the signal processing community and currently serves as Associate Editor of Computer Vision and Image Understanding and SIAM Imaging Sciences. He has been on the Technical Committee of various conferences, serves on the steering committee of the SPARS workshop and was co-General Chairman of the EUSIPCO 2008 conference. Pierre Vandergheynst is the author or co-author of more than 70 journal papers, one monograph and several book chapters. He has received two IEEE best paper awards. Professor Vandergheynst is a laureate of the Apple 2007 ARTS award and of the 2009-2010 De Boelpaepe prize of the Royal Academy of Sciences of Belgium.
Benjamin DwirTitre académique: Dr.
Date de naissance: 24.10.1959
Nationalité: Suisse
A l'EPFL depuis: 1988
Alok RudraEnseignement et PhD Cours Introduction to Metalorganic Vapour Phase Epitaxy of III-V semiconductors PHYS-747
Giancarlo Ferrari TrecateExpertise
Automatic control, Dependable control, Neural-network Control, Machine learning, Microgrids, Hybrid systems
Mission
See the webpage of the DECODE (Dependable Control and Decision) group.
Teaching & PhD PhD Students Laura Meroi, Julien Pallage, Nicolas Léo Pierre Kirsch, Simone Baratto, Daniele Martinelli, Riccardo Cescon, Jakob Nylöf, Sabri El Amrani Past EPFL PhD Students Pulkit Nahata, Mustafa Sahin Turan, Baiwei Guo, Jean-Sébastien Brouillon, Clara Galimberti, Andrea Martin, Muhammad Zakwan,
Alexandre SchmidEnseignement et PhD A dirigé les thèses EPFL de Mahsa Shoaran, Wen-Yang Hsu, Reza Ranjandish, Keyvan Farhang Razi, Mohammad Javad Karimi A co-dirigé les thèses EPFL de Milos Stanisavljevic, Neil Joye, Vahid Majidzadeh Bafar, Hossein Afshari, Nikola Katic, Abdulkadir Akin Cours Analog circuits for biochip EE-518 Introduction à la conception analogique CMOS pour des biocapteurs à distance sur puce. Compréhension et la conception de systèmes de biocapteurs actifs et alimentés à distance. Compré
Mirjana StojilovicMirjana Stojilović received the Dipl. Ing. and Ph.D. degrees from the School of Electrical Engineering, University of Belgrade, in 2006 and 2013, respectively. From 2010 to 2013, she was collaborating with the Processor Architecture Laboratory at EPFL, visiting periodically as a Guest Researcher. From 2013 to 2016, she was working at the University of Applied Sciences Western Switzerland as a senior researcher, and at EPFL as a lecturer. She joined Parallel Systems Architecture Lab at EPFL in October 2016. Mirjana's main research interests include electronic design automation, reconfigurable computing, electromagnetic-compatibility and signal-integrity issues, and hardware security. Mirjana Stojilović serves on the program committee of the FPGA, FPL, and FCCM conferences and as a reviewer for IEEE TCAD, TVLSI, TC, TEMC, IEEE Access and ACM TRETS. She received the Best Paper Award at 2016 International Symposium on Electromagnetic Compatibility (EMC Europe 2016), Young Scientist Award at 33rd International Conference on Lightning Protection (ICLP2016), and the Young Author Best Paper Award at the 20th Telecommunication Forum in Belgrade (TELFOR 2012). In 2015, the EPFL School of Computer and Communication Sciences (IC) presented her with the Teaching Award.