Giovanni De MicheliExpertise
Technologies de conception pour les systèmes intégrés, tels que la synthèse, le codesign de HW/SW et la conception de basse puissance. Technologies de conception des systèmes sur les plateformes hétérogènes comprenant les composants électriques, et biologiques.
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Enseignement et PhD A dirigé les thèses EPFL de Abhishek Garg, Mohamed Haykel Ben Jamaa, Francesco Zanini, Ciprian Seiculescu, Cristina Boero, Hu Xu, Andrea Cavallini, Shashi Kanth Alireza MafiExpertise
Théorie de l'électromagnétismeAntennes et Micro-ondesCircuits Intégrés de RadiofréquenceRéseaux PhasésBioélectronique
Expertise
Théorie de l'électromagnétismeAntennes et Micro-ondesCircuits Intégrés de RadiofréquenceRéseaux PhasésBioélectronique
Je suis doctorant en Génie électrique à l'école Polytechnique Fédérale de Lausanne (EPFL). J'ai obtenu mon Master en Génie électrique (Communications Micro-ondes et Optiques) à l'Université de Technologie de Sharif, Téhéran, Iran, en 2022. J'ai également t
André ChatelExpertise
Micro and NanotechnologiesMicroelectronicsSolid State PhysicsQuantum Physics
Born in Aosta (Italy) in 1996, I obtained a 110L/110 Bachelor degree in Physical Engineering from Politecnico di Torino in 2018. I then followed a Master joined program in Nanotechnologies for ICTs, shared between PoliTO, INPG-Phelma and EPFL, getting graduated in 2020, with a 110L/110 score.In summer 2019, I joined Dr. Sallese group at EPFL-EDLAB to carry out an internship in modeling and simulation of radiation-induced
Jean-Michel SalleseEnseignement et PhD Doctorant·es actuel·les Marta Macaluso A dirigé les thèses EPFL de Luca Gautero, Fengda Sun, Frédéric Zanella, Lucian Barbut, Farzan Jazaeri, Camillo Stefanucci, Jacopo Bronuzzi, Georgi Gorine, Chiara Rossi, Viros Sriskaran, Arnout Devos, Gennaro Termo A co-dirigé les thèses EPFL de Louis Harik, Fabrizio Lo Conte, Maria-Alexandra Paun, Anurag Mangla, Pranav Vivek Kulkarni Cours Electronique EE-280 Présentation des principaux composants de base de l'électronique.Analyse
Diego Ruben BarrettinoDiego Barrettino received the Dipl.-Ing. degree in Electronic Engineering from the University of Buenos Aires, Argentina, in 1997, and the Ph.D. degree in Electrical Engineering from the Swiss Federal Institute of Technology Zurich (ETHZ), Switzerland, in 2004. From 1997 to 2000, he worked in Allegro MicroSystems, Inc., where he was an Analog IC Designer of Hall-effect magnetic sensors. From 2000 to 2004, he was a Research Assistant at ETHZ. In 2004, he was a Postdoctoral Research Associate in the Universit
Alexandre SchmidEnseignement et PhD A dirigé les thèses EPFL de Mahsa Shoaran, Wen-Yang Hsu, Reza Ranjandish, Keyvan Farhang Razi, Mohammad Javad Karimi A co-dirigé les thèses EPFL de Milos Stanisavljevic, Neil Joye, Vahid Majidzadeh Bafar, Hossein Afshari, Nikola Katic, Abdulkadir Akin Cours Analog circuits for biochip EE-518 Introduction à la conception analogique CMOS pour des biocapteurs à distance sur puce. Compréhension et la conception de systèmes de biocapteurs actifs et alimentés à distance. Compré
Jürgen BruggerI am a Professor of Microengineering and co-affiliated to Materials Science. Before joining EPFL I was at the MESA Research Institute of Nanotechnology at the University of Twente in the Netherlands, at the IBM Zurich Research Laboratory, and at the Hitachi Central Research Laboratory, in Tokyo, Japan. I received a Master in Physical-Electronics and a PhD degree from Neuchâtel University, Switzerland. Research in my laboratory focuses on various aspects of MEMS and Nanotechnology. My group contributes to the field at the fundamental level as well as in technological development, as demonstrated by the start-ups that spun off from the lab. In our research, key competences are in micro/nanofabrication, additive micro-manufacturing, new materials for MEMS, increasingly for wearable and biomedical applications. Together with my students and colleagues we published over 200 peer-refereed papers and I had the pleasure to supervise over 25 PhD students. Former students and postdocs have been successful in receiving awards and starting their own scientific careers. I am honoured for the appointment in 2016 as Fellow of the IEEE “For contributions to micro and nano manufacturing technology”. In 2017 my lab was awarded an ERC AdvG in the field of advanced micro-manufacturing.
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
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