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Concept

Gestion de mémoire par régions

Publications associées (19)

Comprehensive Memory Safety Validation: An Alternative Approach to Memory Safety

Mathias Josef Payer

Comprehensive memory safety validation identifies the memory objects whose accesses provably comply with all classes of memory safety, protecting them from memory errors elsewhere at low overhead. We assess the breadth and depth of comprehensive memory saf ...

Ieee Computer Soc2024

Formal Foundations of Capture Tracking

Aleksander Slawomir Boruch-Gruszecki

Type systems are a device for verifying properties of programs without running them. Many programming languages used in the industry have always had a type system, while others were initially created without a type system and later adopted one, when the ad ...

EPFL2024

One-shot Garbage Collection for In-memory OLTP through Temporality-aware Version Storage

Anastasia Ailamaki, Periklis Chrysogelos, Angelos Christos Anadiotis, Syed Mohammad Aunn Raza

Most modern in-memory online transaction processing (OLTP) engines rely on multi-version concurrency control (MVCC) to provide data consistency guarantees in the presence of conflicting data accesses. MVCC improves concurrency by generating a new version o ...

ACM2023

ExG Signal Feature Selection Using Hyperdimensional Computing Encoding

David Atienza Alonso, Tomas Teijeiro Campo, Una Pale

Wearable IoT devices and novel continuous monitoring algorithms are essential components of the healthcare transition from reactive interventions focused on symptom treatment to more proactive prevention, from one-size-fits-all to personalized medicine, an ...

IEEE2022

Preventing Use-After-Free Attacks with Fast Forward Allocation

Sanidhya Kashyap

Memory-unsafe languages are widely used to implement critical systems like kernels and browsers, leading to thousands of memory safety issues every year. A use-after-free bug is a temporal memory error where the program accidentally visits a freed memory l ...

USENIX ASSOC2021

Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads

Robert Giterman

Side-channel attacks constitute a concrete threat to IoT systems-on-a-chip (SoCs). Embedded memories implemented with 6T SRAM macrocells often dominate the area and power consumption of these SoCs. Regardless of the computational platform, the side-channel ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Verifying Software Network Functions with No Verification Expertise

George Candea, Aikaterini Argyraki, Solal Vincenzo Pirelli, Luis David Figueiredo Mascarenhas Moreira Pedrosa, Rishabh Ramesh Iyer

We present the design and implementation of Vigor, a software stack and toolchain for building and running software network middleboxes that are guaranteed to be correct, while preserving competitive performance and developer productivity. Developers write ...

ACM2019

Detailed Heap Profiling

James Richard Larus, Stuart Anthony Byma

Modern software systems heavily use the memory heap. As systems grow more complex and compute with increasing amounts of data, it can be difficult for developers to understand how their programs actually use the bytes that they allocate on the heap and whe ...

ACM2018

Contract-Based Resource Verification for Higher-Order Functions with Memoization

Viktor Kuncak, Ravichandhran Kandhadai Madhavan

We present a new approach for specifying and verifying resource utilization of higher-order functional programs that use lazy evaluation and memoization. In our approach, users can specify the desired resource bound as templates with numerical holes e.g. a ...

Assoc Computing Machinery2017

LMS-Verify: Abstraction without Regret for Verified Systems Programming’

Tiark Rompf, Nada Amin

Performance critical software is almost always developed in C, as programmers do not trust high-level languages to deliver the same reliable performance. This is bad because low-level code in unsafe languages attracts security vulnerabilities and because d ...

Assoc Computing Machinery2017

Algorithmic Resource Verification

Ravichandhran Kandhadai Madhavan

Static estimation of resource utilisation of programs is a challenging and important problem with numerous applications. In this thesis, I present new algorithms that enable users to specify and verify their desired bounds on resource usage of functional p ...

EPFL2017

Simulation of High-Performance Memory Allocators

David Atienza Alonso

Current general-purpose memory allocators do not provide sufficient speed or flexibility for modern highperformance applications. To optimize metrics like performance, memory usage and energy consumption, software engineers often write custom allocators fr ...

IEEE Press2010

Formalizing and verifying transactional memories

Transactional memory (TM) has shown potential to simplify the task of writing concurrent programs. TM shifts the burden of managing concurrency from the programmer to the TM algorithm. The correctness of TM algorithms is generally proved manually. The goal ...

EPFL2010

MPSoC Design using Application-Specific Architecturally Visible Communication

Edoardo Charbon, Paolo Ienne, Philip Brisk, Ties Jan Henderikus Kluter

This paper advocates the placement of Architecturally Visible Communication (AVC) buffers between adjacent cores in MPSoCs to provide high-throughput communication for streaming applications. Producer/consumer relationships map poorly onto cache-based MPSo ...

Springer-Verlag2009

Opis: Reliable Distributed Systems in OCaml

Viktor Kuncak, Dejan Kostic

Concurrency and distribution pose algorithmic and implementation challenges in developing reliable distributed systems, making the field an excellent testbed for evaluating programming language and verification paradigms. Several specialized domain-specifi ...

2009

Opis: Reliable Distributed Systems in OCaml

Viktor Kuncak, Dejan Kostic

2009

Reflexes: programming abstractions for highly responsive computing in Java

Jesper Honig Spring

Achieving sub-millisecond response times in a managed language environment such as Java introduces significant implementation challenges. The Achilles' heel of Java is its reliance on automatic memory management for reclaiming dead objects. Typically, the ...

EPFL2008

Diversity embedding for broadband communication

Sanket Dusad

Given uncertainty in environment, a conservative approach is to design for the worst case, leading to a game-theoretic situation where the environment is controlled by an adversary. However, in many cases, the uncertainty arises from randomness, not an adv ...

EPFL2008

Modeling challenges in computational electromagnetics : large planar multilayered structures and finite-thickness irises

Ivica Stevanovic

Printed multilayered media with metallizations embedded between dielectric layers are one of the most successful technologies for manufacturing planar structures with a good performanceto-price ratio. These structures range from PC board circuits, through ...

EPFL2005