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Concept

PDP-11

Publications associées (5)

i-DPs CGRA: An Interleaved-Datapaths Reconfigurable Accelerator for Embedded Bio-signal Processing

David Atienza Alonso, Giovanni Ansaloni, Miguel Peon Quiros, Soumya Subhra Basu, Loris Gérard Duch

Smart edge sensors for bio-signal monitoring must support complex signal processing routines within an extremely small energy envelope. Coarse-Grained Reconfigurable Arrays (CGRAs) are good candidates for tackling these conflicting objectives because, than ...

2019

A Low Dark Count p-i-n Diode Based SPAD in CMOS Technology

Edoardo Charbon

In this paper, a novel CMOS single-photon avalanche diode (SPAD) is presented, and the device is designed using a vertical p-i-n diode construction. The p-i-n diode with a wide depletion region enables a low-noise operation. The proposed design achieves da ...

2015

A Distributed Polling with Probabilistic Privacy

Rachid Guerraoui, Florian Huc

In this paper, we present PDP, a distributed polling protocol that enables a set of participants to gather their opinion on a common interest without revealing their point of view. PDP does not rely on any centralized authority or on heavyweight cryptograp ...

2013

RST Controller Design by Convex Optimization Using Frequency-Domain Data

Alireza Karimi, Roland Longchamp, Gorka Galdos Sanz de Galdeano

A new robust fixed-order RST controller design approach by convex optimization is proposed in this paper. Only frequency-domain data are considered in the approach for linear time-invariant single-input single-output systems. It is shown that performance s ...

2011

Chip-Level Redundancy in Distributed Shared-Memory Multiprocessors

Babak Falsafi

Distributed shared-memory (DSM) multi- processors provide a scalable hardware platform, but lack the necessary redundancy for mainframe-level reliability and availability. Chip-level redundancy in a DSM server faces a key challenge: the increased latency t ...

2009