Shashwat ShrivastavaI am a Ph.D. student at EPFL, advised by Dr. Mirjana Stojilović. I am broadly interested in FPGA architecture and Computer-Aided Design. My research is focused on reducing the compile time for FPGAs by incorporating architectural enhancements and rethinking CAD algorithms.
James Richard LarusEnseignement et PhD A dirigé les thèses EPFL de Stuart Anthony Byma, David Teksen Aksun, Sahand Kashani A co-dirigé les thèses EPFL de Adrien Ghosn, Seyedmahyar Emami
Martin Alois RohrmeierEnseignement et PhD Doctorant·es actuel·les Joris Monnet, Marina Borsodi-Benson, Xinyi Guan, Xiaoxuan Wang, Zeng Ren A dirigé les thèses EPFL de Fabian Claude Moss, Daniel Harasim, Christoph Finkensiep, Johannes Hentschel, Gabriele Cecchetti, Shuxin Meng Cours Digital musicology DH-401 Ce cours a pour but de familiariser les étudiants avec les thèmes principaux en musicologie digitale, ainsi que les approches et méthodes théoriques essentielles. Dans la partie pratique, les étudiants feron
Ioannis RammosYannis Rammos is a postdoc at the EPFL Digital & Cognitive Musicology Lab and visiting piano faculty at European University Cyprus. An internationally active pianist and piano pedagogue trained in Russia, during the past two years he has been invited to deliver masterclasses, performances, and lectures at the Anton Bruckner Privatuniversität für Musik, the Estonian Academy for Music & Theater, the Russian Institute for Art History, and Conservatorium van Amsterdam, among other venues. Formerly a researcher in music theory at the Sibelius Academy, he completed his doctoral studies in piano and music theory at the CUNY Graduate Center and New York University, graduating from the latter with a Ph.D. in classical performance. His latest publications have appeared in
Music & Letters
,
Quodlibet
, and
Music Theory & Analysis
. His research spans Schenker studies, critical theory (especially of French poststructuralist origin), Russian music theory, and piano timbre studies. At EPFL he contributes to the Laboratory's overarching corpus initiative, focusing on the history of Western harmony and formalizations of Schenkerian tonal structures.
Viktor KuncakViktor Kunčak joined EPFL in 2007, after receiving a PhD degree from MIT. Since then has been leading the Laboratory for Automated Reasoning and Analysis and supervised at least 12 completed PhD theses. His works on languages, algorithms and systems for verification and automated reasoning. He served as an initiator and one of the coordinators of a European network (COST action) in the area of automated reasoning, verification, and synthesis. In 2012 he received a 5-year single-investigator European Research Council (ERC) grant of 1.5M EUR. His invited talks include those at Lambda Days, Scala Days, NFM, LOPSTR, SYNT, ICALP, CSL, RV, VMCAI, and SMT. A paper on test generation he co-authored received an ACM SIGSOFT distinguished paper award at ICSE. A PLDI paper he co-authored was published in the Communications of the ACM as a Research Highlight article. His Google Scholar profile reports an over-approximate H-index of 38. He was an associate editor of ACM Transactions on Programming Languages and Systems (TOPLAS) and served as a co-chair of conferences on Computer-Aided Verification (CAV), Formal Methods in Computer Aided Design (FMCAD), Workshop on Synthesis (SYNT), and Verification, Model Checking, and Abstract Interpretation (VMCAI). At EPFL he teaches courses on functional and parallel programming, compilers, and verification. He has co-taught the MOOC "Parallel Programming" that was visited by over 100'000 learners and completed by thousands of students from all over the world.
David Atienza AlonsoDavid Atienza Alonso is an associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures. Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.
Clément Pit-ClaudelTeaching & PhD PhD Students Yawen Guan, Kacper Feliks Korban, Can Cebeci, Alexandre Pinazza, Shardul Chiplunkar Courses Interactive Theorem Proving Project CS-642 A project-focused introduction to interactive theorem proving. Interactive theorem proving CS-428 A hands-on introduction to interactive theorem proving, computer-checked mathematics, compiler verification, proofs as programs, dependent types, and proof automation.Come learn how to write computer-checked proofs an
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
