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Concept

Protocole de cohérence de cache

Publications associées (32)

Closing the Performance Gap Between Volatile and Persistent Key-Value Stores Using Cross-Referencing Logs

Matej Pavlovic

Key-Value (K-V) stores are an integral building block in modern datacenter applications. With byteaddressable persistent memory (PM) technologies, such as Intel/Micron's 3D XPoint, on the horizon, there has been an influx of new high performance K-V stores ...

USENIX ASSOC2018

Information-Theoretic Caching: The Multi-User Case

Michael Christoph Gastpar, Chien-Yi Wang, Sung Hoon Lim

In this paper, we consider a cache aided network in which each user is assumed to have individual caches, while upon users’ requests, an update message is sent through a common link to all users. First, we formulate a general information theoretic setting ...

Institute of Electrical and Electronics Engineers2017

Abstracting Multi-Core Topologies with MCTOP

Rachid Guerraoui, Vasileios Trigonakis, Georgios Chatzopoulos

Portability and efficiency are usually antagonists in multi-core computing. In order to develop efficient code, one needs to take into account the topology of the target multi-cores (e.g., for locality). This clearly hampers code portability. In this paper ...

ACM Press2017

ReCache: Reactive Caching for Fast Analytics over Heterogeneous Data

Anastasia Ailamaki, Manolis Karpathiotakis, Tahir Azim

As data continues to be generated at exponentially growing rates in heterogeneous formats, fast analytics to extract meaningful information is becoming increasingly important. Systems widely use in-memory caching as one of their primary techniques to speed ...

2017

Fat Caches For Scale-Out Servers

Babak Falsafi, Boris Robert Grot, Stavros Volos, Dorde Jevdic

The authors propose a high-capacity cache architecture that leverages emerging high-bandwidth memory modules. High-capacity caches capture the secondary data working sets of scale-out workloads while uncovering significant spatiotemporal locality across da ...

Institute of Electrical and Electronics Engineers2017

The Mondrian Data Engine

Babak Falsafi, Boris Robert Grot, Javier Picorel Obando, Alexandros Daglis, Mario Paulo Drumond Lages De Oliveira, Dmitrii Ustiugov, Nooshin Sadat Mirzadeh

The increasing demand for extracting value out of ever-growing data poses an ongoing challenge to system designers, a task only made trickier by the end of Dennard scaling. As the performance density of traditional CPU-centric architectures stagnates, adva ...

2017

Caching Gaussians: Minimizing Total Correlation on the Gray–Wyner Network

Michael Christoph Gastpar, Guillaume Jean Op 't Veld

We study a caching problem that resembles a lossy Gray–Wyner network: A source produces vector samples from a Gaussian distribution, but the user is interested in the samples of only one component. The encoder first sends a cache message without any knowle ...

Ieee2016

Information Theoretic Caching: The Multi-User Case

Michael Christoph Gastpar, Chien-Yi Wang, Sung Hoon Lim

In this paper, we present information theoretic inner and outer bounds on the fundamental tradeoff between cache memory size and update rate in a multi-user cache network. Each user is assumed to have individual caches, while upon users’ requests, an updat ...

Ieee2016

Characterization of the Impact of Hardware Islands on OLTP

Anastasia Ailamaki, Pinar Tözün, Ippokratis Pandis, Danica Porobic, Miguel Sérgio De Oliveira Branco

Modern hardware is abundantly parallel and increasingly heterogeneous. The numerous processing cores have non-uniform access latencies to the main memory and processor caches, which causes variability in the communication costs. Unfortunately, database sys ...

Springer Verlag2016

A Cache-Assisted Scratchpad Memory for Multiple-Bit-Error Correction

Nooshin Sadat Mirzadeh

Scratchpad memory (SPM) is widely used in modern embedded processors to overcome the limitations of cache memory. The high vulnerability of SPM to soft errors, however, limits its usage in safety-critical applications. This paper proposes an efficient faul ...

Ieee-Inst Electrical Electronics Engineers Inc2016

K Users Caching Two Files: An Improved Achievable Rate

Michael Christoph Gastpar, Saeid Sahraei

Caching is an approach to smoothen the variability of traffic over time. Recently it has been proved that the local memories at the users can be exploited for reducing the peak traffic in a much more efficient way than previously believed. In this work we ...

Ieee2016

SABRes: Atomic Object Reads for In-Memory Rack-Scale Computing

Babak Falsafi, Edouard Bugnion, Boris Robert Grot, Alexandros Daglis, Stanko Novakovic, Dmitrii Ustiugov

Modern in-memory services rely on large distributed object stores to achieve the high scalability essential to service thousands of requests concurrently. The independent and unpredictable nature of incoming requests results in random accesses to the objec ...

Ieee2016