Publications associées à System bus

Uncooperative Rendezvous in Space: Design of an Electronic Architecture for High Performance Avionic with Multi Sensor Input and Intensive Data Rate

Active Debris Removal missions consist of sending a satellite in space and removing one or more debris from their current orbit. A key challenge is to obtain information about the uncooperative target. By gathering the velocity, position, and rotation of t ...

EPFL2022

Assessment of the Thermal-Hydraulic Performance of the European DEMO NbTi Bus Bars

Rainer Wesche, Kamil Sedlák, Roberto Guarino

We present a numerical assessment of the thermal-hydraulic performance of the NbTi bus bars designed for the European DEMO. We consider the CS, TF and PF bus bars, as well as two alternative TF options for high-current operations. The main sources of stati ...

IEEE Institute of Electrical and Electronics Engineers2022

Software Support for Non-Volatile Memory (NVM) Programming

David Teksen Aksun

Non-Volatile Memory (NVM) is an emerging type of memory device that provides fast, byte-addressable, and high-capacity durable storage. NVM sits on the memory bus and allows durable data structures designs similar to the in-memory equivalent ones. Expensiv ...

EPFL2021

A design proposal for the European DEMO superconducting bus bars and current leads

Pierluigi Bruzzone, Kamil Sedlák, Rainer Wesche, Roberto Guarino

The integration of the feeder system in a tokamak involves complex engineering, manufacturing and logistics issues. Therefore, within the pre-conceptual design activities of the European DEMO fusion reactor, it is important to provide a preliminary sizing ...

2021

GPU-accelerated data management under the test of time

Anastasia Ailamaki, Syed Mohammad Aunn Raza, Periklis Chrysogelos, Angelos Christos Anadiotis, Panagiotis Sioulas

GPUs are becoming increasingly popular in large scale data center installations due to their strong, embarrassingly parallel, processing capabilities. Data management systems are riding the wave by using GPUs to accelerate query execution, mainly for analy ...

2020

Pythia: Remote Oracles for the Masses

Mathias Josef Payer, Yuqing Zhang

Remote Direct Memory Access (RDMA) is a technology that allows direct access from the network to a machine's main memory without involving its CPU. RDMA offers low-latency, high-bandwidth performance and low CPU utilization. While RDMA provides massive per ...

USENIX ASSOC2019

Optimal Software Patching Plan for PMUs

Jean-Yves Le Boudec, Ola Nils Anders Svensson, Teklemariam Tsegay Tesfay

Phasor measurement units (PMUs) deployed to monitor the state of an electrical grid need to be patched from time to time to prevent attacks that exploit vulnerabilities in the software. Applying some of these patches requires a PMU reboot, which takes the ...

2017

An Ultra-High Speed Emulator Dedicated to Power System Dynamics Computation Based on a Mixed-Signal Hardware Platform

Maher Kayal, Sidi-Rachid Cherkaoui, Laurent Fabre, Ira Nagel, Theodoros Kyriakidis, Guillaume Olivier Lanz, Denis Sallin

This paper presents an ultra-high speed hardware platform dedicated to power system dynamic (small signal) and transient (large signal) stability. It is based on an intrinsic parallel architecture which contains hybrid mixed-signal (analog and digital) cir ...

IEEE Institute of Electrical and Electronics Engineers2013

Power and pin efficient chip-to-chip communications with common-mode rejection and sso resilience

Mohammad Amin Shokrollahi, Harm Cronie

In bus communications methods and apparatus, a first set of physical signals representing the information to be conveyed over the bus is provided, and mapped to a codeword of a spherical code, wherein a codeword is representable as a vector of a plurality ...

2012

Orthogonal differential vector signaling

Mohammad Amin Shokrollahi, Harm Cronie

Using a transformation based at least in part on a non-simple orthogonal or unitary matrix, data may be transmitted over a data bus in a manner that is resilient to one or more types of signal noise, that does not require a common reference at the transmis ...

2011

Error control coding for orthogonal differential vector signaling

Mohammad Amin Shokrollahi, Harm Cronie

Using a transformation based, at least in part, on a non-simple orthogonal matrix, data may be transmitted over a data bus in a manner that is resilient to one or more types of signal noise, that does not require a common reference at the transmission and ...

2011

Network-On-Chip Design and Synthesis Outlook

Giovanni De Micheli, David Atienza Alonso, Luca Benini, Srinivasan Murali, Federico Angiolini

With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor Systems-On-Chip (MPSoCs) consisting of complex integrated components communicating with each other at very high-speed rates. Intercommunication ...

2008

Data-flow transformations to maximize the use of carry-save representation in arithmetic circuits

Paolo Ienne, Philip Brisk, Ajay Kumar Verma

The increasing importance,of datapath circuits in complex systems-on-chip calls for special arithmetic optimizations. The goal is to automatically achieve the handcrafted results which escape classic logic optimizations. Some work has been done in the rece ...

2008

Routing in large-scale buses ad hoc networks

Michel Sède, Da Li

A Disruption-Tolerant Network (DTN) attempts to route packets between nodes that are temporarily connected. Difficulty in such networks is that nodes have no information about the network status and contact opportunities. The situation is different in publ ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2008

ASEBA, an event-based middleware for distributed robot control

Francesco Mondada, Stéphane Magnenat, Valentin Longchamp

Computing infrastructures of mobile robots have grown in complexity in the last decades; They have evolved from single processor systems to networks of microcontrollers communicating through a shared bus. This has induced additional architectural constrain ...

IEEE Press2007

A Robust Self-calibrating Transmission Scheme for On-Chip Networks

Giovanni De Micheli, Paolo Ienne, Patrick Thiran, Frédéric Worm

Systems-on-Chip (SoC) design involves several challenges, stemming from the extreme miniaturization of the physical features and from the large number of devices and wires on a chip. Since most SoCs are used within embedded systems, specific concerns are i ...

2005