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Concept

Dataflow programming

Publications associées (32)

Speculative Dataflow Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic

With FPGAs facing broader application domains, the conversion of imperative languages into dataflow circuits has been recently revamped as a way to overcome the conservatism of statically scheduled high-level synthesis. Apart from the ability to extract pa ...

ASSOC COMPUTING MACHINERY2019

Switching event detection and self-termination programming circuit for energy efficient ReRAM memory arrays

Alexandre Sébastien Julien Levisse

Energy efficiency remains a challenge for the design of non-volatile resistive memories (ReRAMs) arrays. This memory technology suffers from intrinsic variability in switching speed, programming voltages and resistance levels. The programming conditions of ...

2019

Optimized Quantization in Distributed Graph Signal Processing

Pascal Frossard, Isabela Cunha Maia Nobre

Distributed graph signal processing methods require that the graph nodes communicate by exchanging messages. These messages have a finite precision in a realistic network, which may necessitate to implement quantization. Quantization, in turn, generates er ...

IEEE2019

A Tangible Programming Language for the Educational Robot Thymio

Francesco Mondada, Christian Giang, Alberto Piatti, Andrea Mussati

In the past, the use of tangible programming languages has shown several advantages compared to screen-based graphical programming languages. Especially when presented to novices, such interfaces may represent a more intuitive and straightforward alternati ...

2019

Traffic Locality as an Opportunity in the Data Center

Jonas Fietz

In large scale data centers, network infrastructure is becoming a major cost component; as a result, operators are trying to reduce expenses, and in particular lower the amount of hardware needed to achieve their performance goals (or to improve the perfor ...

EPFL2019

Shared-variable Synchronization Approaches for Dynamic Data Flow Programs

Marco Mattavelli, Endri Bezati, Simone Casale Brunet, Apostolos Modas, Junaid Jameel Ahmad

This paper presents shared-variable synchronization approaches for dataflow programming. The mechanisms do not require any substantial model of computation (MoC) modification, and is portable across both for hardware (HW) and software (SW) low-level code s ...

IEEE2018

High-Precision Performance Estimation for the Design Space Exploration of Dynamic Dataflow Programs

Marco Mattavelli, Simone Casale Brunet, Endri Bezati, Malgorzata Maria Michalska

The implementation and optimization of dynamic dataflow programs on multi/many-core platforms require solving a very difficult problem: how to partition and schedule the processing elements and dimension their interconnecting buffers according to given opt ...

2017

Execution Trace Graph of Dataflow Process Networks

Marco Mattavelli, Simone Casale Brunet

The paper introduces and specifies a formalism that provides complete representations of dataflow process network (DPN) program executions, by means of directed acyclic graphs. Such graphs, also known as execution trace graphs (ETG), are composed of nodes ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2018

Efficient Dynamic Optimisation Heuristics for Dataflow Pipelines

Marco Mattavelli, Endri Bezati, Simone Casale Brunet, Anatoly Prihozhy

Large dataflow designs appear as a result of functional specification of modern complex digital systems and/ or a result of unfolding and behavioral transformation of looped and branched programs. Since deep-submicron silicon technology provides large amou ...

IEEE2018

Buffer dimensioning for throughput improvement of dynamic dataflow signal processing applications on multi-core platforms

Marco Mattavelli, Simone Casale Brunet, Endri Bezati, Malgorzata Maria Michalska

Executing a dataflow program on a parallel platform requires assigning to each buffer a given size so that correct program executions take place without introducing any deadlock. Furthermore, in the case of dynamic dataflow programs, specific buffer size a ...

2017

Systematic Design Space Exploration of Dynamic Dataflow Programs for Multi-core Platforms

Malgorzata Maria Michalska

The limitations of clock frequency and power dissipation of deep sub-micron CMOS technology have led to the development of massively parallel computing platforms. They consist of dozens or hundreds of processing units and offer a high degree of parallelism ...

EPFL2017

Near-optimal Deployment of Dataflow Applications on Many-core Platforms with Real-time Guarantees

Alena Simalatsar, Stefanos Skalistis

Safe and optimal deployment of data-streaming applications on many-core platforms requires the realistic estimation of task Worst-Case Execution Time (WCET). On the other hand, task WCET depends on the deployment solution, due to the varying number of inte ...

IEEE2017