Publication

Towards Analog and Mixed-Signal SOC Design with SystemC-AMS

Alain Vachoux
2004
Conference Papers

Abstract

Systems-on-Chip (SoCs) are heterogeneous by nature as they may integrate digital, analog, RF hardware as well as software components or non electrical parts such as sensors or actuators. The increasing level of complexity for designing SoCs in a reasonable amount of time and resources asks, among other capabilities, for powerful modeling and simulation means. SystemC is emerging as a de facto standard for digital system design, but is still lacking a standard support of continuous-time and mixed discrete-event/continuous-time systems. This paper presents the first elements of extensions to SystemC, called SystemC-AMS, that are proposed to fill the gap.

Official source

https://infoscience.epfl.ch/entities/publication/f8252ac1-0891-4523-8ffa-81092ffa8e43

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Alain Vachoux
2004
Conference Papers

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/f8252ac1-0891-4523-8ffa-81092ffa8e43

About this result

Related concepts (32)

SystemC

SystemC is a set of C++ classes and macros which provide an event-driven simulation interface (see also discrete event simulation). These facilities enable a designer to simulate concurrent processes, each described using plain C++ syntax. SystemC processes can communicate in a simulated real-time environment, using signals of all the datatypes offered by C++, some additional ones offered by the SystemC library, as well as user defined.

Hardware description language

In computer engineering, a hardware description language (HDL) is a specialized computer language used to describe the structure and behavior of electronic circuits, and most commonly, digital logic circuits. A hardware description language enables a precise, formal description of an electronic circuit that allows for the automated analysis and simulation of an electronic circuit.

SystemVerilog

SystemVerilog, standardized as IEEE 1800, is a hardware description and hardware verification language used to model, design, simulate, test and implement electronic systems. SystemVerilog is based on Verilog and some extensions, and since 2008, Verilog is now part of the same IEEE standard. It is commonly used in the semiconductor and electronic design industry as an evolution of Verilog. SystemVerilog started with the donation of the Superlog language to Accellera in 2002 by the startup company Co-Design Automation.

Related publications (1)

Towards Analog and Mixed-Signal SOC Design with SystemC-AMS

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Modeling embedded systems using SystemC extensions