Synthesizing Hardware from Dataflow Programs

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Synthesizing Hardware from Dataflow Programs

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Execution Trace Graph Based Multi-criteria Partitioning of Stream Programs

A joint typicality approach to compute-forward

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Actor Merging for Dataflow Process Networks

Dataflow Programs Analysis and Optimization Using Model Predictive Control Techniques. Two Examples of Bounded Buffer Scheduling: Deadlock Avoidance and Deadlock Recovery Strategies

Synthesis and Optimization of Pipelines for HW Implementations of Dataflow Programs

Exploring MPEG HEVC decoder parallelism for the efficient porting onto many-core platforms

Characterizing communication behavior of dataflow programs using trace analysis

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High-level dataflow design of signal processing systems for reconfigurable and multicore heterogeneous platforms