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In this work, we present an automated approach for locating power-wasting attackers in shared FPGAs. In this approach, the FPGA shell is responsible for, first, placing the user designs and, second, inserting voltage sensors in a nonintrusive and adaptive manner. We derive a metric for comparing transient voltage fluctuations recorded at different sensor locations and use it to locate the source of the highest disturbance. We implement and test our approach on a Xilinx Virtex-7 FPGA. In all our experiments, we successfully locate the attacker.
Mirjana Stojilovic, Stefan Nikolic, Shashwat Shrivastava