High-level system synthesis and optimization of dataflow programs for MPSoCs

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We present a robust model predictive control (MPC) framework for linear systems facing bounded parametric uncertainty and bounded disturbances. Our approach deviates from standard MPC formulations by integrating multi-step predictors, which provide reduced ...

We present a cost-effective electro-optic frequency comb generation and equalization method using a single phase modulator inserted in a Sagnac interferometer layout. The equalization relies on the interference of comb lines generated in both clockwise and ...

This paper presents a novel distributed approach for solving AC power flow (PF) problems. The optimization problem is reformulated into a distributed form using a communication structure corresponding to a hypergraph, by which complex relationships between ...

The use of point clouds as an imaging modality has been rapidly growing, motivating research on compression methods to enable efficient transmission and storage for many applications. While compression standards relying on conven- tional techniques such as ...

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Writing and optimizing application software for heterogeneous platforms including GPU units is a very difficult task that requires designer efforts and resources to consider several key elements to obtain good performance. Dataflow programming has shown to ...

High-level synthesis (HLS) tools typically generate statically scheduled datapaths. Static scheduling implies that the resulting circuits have a hard time exploiting parallelism in code with potential memory dependences, with control dependences, or where ...

The performance of programs executed on heterogeneous parallel platforms largely depends on the design choices regarding how to partition the processing on the various different processing units. In other words, it depends on the assumptions and parameters ...

High-level synthesis (HLS) is the process of automatically generating circuits out of high-level language descriptions. Previous research has shown that dynamically scheduled HLS through elastic circuit generation is successful at exploiting parallelism in ...

Recent GPU architectures make available numbers of parallel processing units that exceed by orders of magnitude the ones offered by CPU architectures. Whereas programs written using dataflow programming languages are well suited for programming heterogeneo ...

A central task in high-level synthesis is scheduling: the allocation of operations to clock cycles. The classic approach to scheduling is static, in which each operation is mapped to a clock cycle at compile-time, but recent years have seen the emergence o ...

High-level system synthesis and optimization of dataflow programs for MPSoCs

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Decision support for the design of integrated biorefineries

Homothetic Tube Model Predictive Control With Multi-Step Predictors

Cost-effective equalization of electro-optic frequency combs in a Sagnac interferometer

Hypergraph-Based Fast Distributed AC Power Flow Optimization

Evaluating the effect of sparse convolutions on point cloud compression

Hybrid Quadratic Programming - Pullback Bundle Dynamical Systems Control

SIMD Parallel Execution on GPU from High-Level Dataflow Synthesis

From C/C plus plus Code to High-Performance Dataflow Circuits

Performance Estimation of High-Level Dataflow Program on Heterogeneous Platforms by Dynamic Network Execution

Unleashing Parallelism in Elastic Circuits with Faster Token Delivery

Inter-actions parallel execution on GPU from high-level dataflow synthesis

DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis