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Multi-level wordline driver for robust SRAM design in nano-scale CMOS technology

Related publications (32)

A 0.21-ps FOM Capacitor-Less Analog LDO with Dual-Range Load Current for Biomedical Applications

This paper presents an output capacitor-less low-dropout regulator (LDO) with a bias switching scheme for biomedical applications with dual-range load currents. Power optimization is crucial for systems with multiple activation modes such as neural interfa ...

ArXiv2023

HPCache: memory-efficient OLAP through proportional caching revisited

Anastasia Ailamaki, Periklis Chrysogelos, Hamish Mcniece Hill Nicholson

Analytical engines rely on in-memory data caching to avoid storage accesses and provide timely responses by keeping the most frequently accessed data in memory. Purely frequency- and time-based caching decisions, however, are a proxy of the expected query ...

Springer2023

Dynamics analysis for DC transformers integration in hybrid AC‐DC power distribution networks

Drazen Dujic, Max Dupont, Jules Christian Georges Macé, Renan Pillon Barcelos, Andrea Cervone

In AC/DC power distributions networks, power converters are interfacing buses to ensure DC voltage regulation and power distribution. Active front ends are used between AC and DC buses and two typical control schemes that can be implemented are voltage reg ...

2023

Integrated Electronics for Deep Implants to Remotely Monitor Hemodynamics

Mustafa Besirli

The integration of technology in the medical field has greatly improved accuracy in diagnoses, thus leading to more effective treatments. Wearable and implantable medical devices offer great potential for remote patient monitoring, particularly for heart f ...

EPFL2023

A Front-End CMOS Interface Circuit With High Voltage Charge Pump and Oscillator for Capacitive Micromachined Ultrasonic Transducers

Sandro Carrara, Zhengwen Jiang, Gian Luca Barbruni, Yihe Zhao

Label-free biosensors, combined with miniaturized micro-electromechanical sensory platforms, offer an attractive solution for real-time and facile monitoring of biomolecules due to their high sensitivity and selectivity without the need for specifically la ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023

Enablers for Overcurrent Capability of Silicon-Carbide-Based Power Converters: An Overview

Elison de Nazareth Matioli

With the increase in penetration of power electronic converters in the power systems, a demand for overcurrent/ overloading capability has risen for the fault clearance duration. This article gives an overview of the limiting factors and the recent technol ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023

In-Memory Hardware and Architectural Extensions for Workloads Acceleration

William Andrew Simon

Utilization of edge devices has exploded in the last decade, with such use cases as wearable devices, autonomous driving, and smart homes. As their ubiquity grows, so do expectations of their capabilities. Simultaneously, their formfactor and use cases lim ...

EPFL2022

Reinforcement Learning-Based Joint Reliability and Performance Optimization for Hybrid-Cache Computing Servers

David Atienza Alonso, Ali Pahlevan, Marina Zapater Sancho, Luis Maria Costero Valero, Darong Huang

Computing servers play a key role in the development and process of emerging compute-intensive applications in recent years. However, they need to operate efficiently from an energy perspective viewpoint, while maximizing the performance and lifetime of th ...

2022

Impact of Interface Traps in Floating-Gate Memory Based on Monolayer MoS2

Andras Kis, Guilherme Migliato Marega

Two-dimensional materials (2DMs) have found potential applications in many areas of electronics, such as sensing, memory systems, optoelectronics, and power. Despite an intense experimental work, the literature is lacking of accurate modeling of nonvolatil ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Request, Coalesce, Serve, and Forget: Miss-Optimized Memory Systems for Bandwidth-Bound Cache-Unfriendly Applications on FPGAs

Paolo Ienne, Mikhail Asiatici

Applications such as large-scale sparse linear algebra and graph analytics are challenging to accelerate on FPGAs due to the short irregular memory accesses, resulting in low cache hit rates. Nonblocking caches reduce the bandwidth required by misses by re ...

ASSOC COMPUTING MACHINERY2022

Method for reading and writing unreliable memories and a corresponding memory controller device and memory

Andreas Peter Burg, Reza Ghanaatian Jahromi

A method of accessing a memory space of a memory device with a decoder, the memory space having faults, including the steps of performing a memory access operation by an electronic device to a access a logical memory space of the memory device, and randomi ...

2022

Thermal and Power-Aware Run-Time Performance Management of 3D MPSoCs with Integrated Flow Cell Arrays

David Atienza Alonso, Halima Najibi, Giovanni Ansaloni, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse

Flow Cell Arrays (FCA) technology employs microchannels filled with an electrolytic fluid to concurrently provide cooling and power generation to integrated circuits (ICs). This solution is particularly appealing for Three-Dimensional Multi-Processor Syste ...

2022