Publication

Interleaved gate acquisition: a low-frequency noise-immune approach to wide field FLIM with time-gated SPAD cameras

Claudio Bruschini
2025

Abstract

Fluorescence lifetime imaging microscopy (FLIM) data acquisition using time-gated single-photon avalanche diode (SPAD) cameras with megapixel sizes involves the sequential acquisition of data at a number G of different gate locations to sample the whole fluorescence decay. This requirement of multiple, high signal-to-noise ratio (SNR) gate images acquisition, which may take several hundred of ms or longer, limits the achievable FLIM frame-rate, but also make them susceptible to artefacts when the signal's intensity is fluctuating faster than the gate series can be acquired. Here, we implement a data acquisition scheme designed to counteract this effect by rapidly acquiring complete sequences of low SNR gate images at the maximum rate sustainable by the camera (50 kHz per 1-bit gate image), allowing a full 1-bit resolution decay to be acquired in G x 20 s. By repeating this sequence of gate shifts N times and accumulating the corresponding gate images, decays with arbitrary SNR can be obtained at a rate of 1/(N x G x 20 s), that are immune to any signal intensity fluctuations happening at any frequency smaller than 1/(G x 20 s) or 0.78 kHz. We illustrate the efficiency of this acquisition approach (dubbed interleaved gate acquisition) with SwissSPAD2 using simple examples. Please verify that (1) all pages are present, (2) all figures are correct, (3) all fonts and special characters are correct, and (4) all text and figures fit within the red margin lines shown on this review document.

Official source

https://infoscience.epfl.ch/entities/publication/a88a1fa4-4ca2-4948-8e8d-b71bee254ba3

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Claudio Bruschini
2025

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/a88a1fa4-4ca2-4948-8e8d-b71bee254ba3

About this result

Related concepts (32)

XOR gate

XOR gate (sometimes EOR, or EXOR and pronounced as Exclusive OR) is a digital logic gate that gives a true (1 or HIGH) output when the number of true inputs is odd. An XOR gate implements an exclusive or () from mathematical logic; that is, a true output results if one, and only one, of the inputs to the gate is true. If both inputs are false (0/LOW) or both are true, a false output results. XOR represents the inequality function, i.e., the output is true if the inputs are not alike otherwise the output is false.

OR gate

The OR gate is a digital logic gate that implements logical disjunction. The OR gate returns true if any of its inputs are true; otherwise it returns false. The input and output states are normally represented by different voltage levels. Any OR gate can be constructed with two or more inputs. It outputs a 1 if any of these inputs are 1, or outputs a 0 only if all inputs are 0. The inputs and outputs are binary digits ("bits") which have two possible logical states.

Logic gate

A logic gate is an idealized or physical device that performs a Boolean function, a logical operation performed on one or more binary inputs that produces a single binary output. Depending on the context, the term may refer to an ideal logic gate, one that has, for instance, zero rise time and unlimited fan-out, or it may refer to a non-ideal physical device (see ideal and real op-amps for comparison). In the real world, the primary way of building logic gates uses diodes or transistors acting as electronic switches.

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