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Caching (a pair of) Gaussians

Related publications (31)

Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads

Side-channel attacks constitute a concrete threat to IoT systems-on-a-chip (SoCs). Embedded memories implemented with 6T SRAM macrocells often dominate the area and power consumption of these SoCs. Regardless of the computational platform, the side-channel ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Caching (Bivariate) Gaussians

Michael Christoph Gastpar, Guillaume Jean Op 't Veld

Caching is a technique that alleviates networks during peak hours by transmitting partial information before a request for any is made. In a lossy setting of Gaussian databases, we study a single-user model in which good caching strategies minimize the dat ...

2020

Successive Refinement to Caching for Dynamic Requests

Michael Christoph Gastpar, Pinar Sen

In the celebrated coded caching problem studied by Maddah-Ali and Niesen, the peak-traffic network load is to be reduced by first caching some information about contents into individual memories of end users during the off-peak hours and then upon user req ...

IEEE2020

A Hybrid Cache HW/SW Stack for Optimizing Neural Network Runtime, Power and Endurance

David Atienza Alonso, William Andrew Simon, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse

Hybrid caches consisting of both SRAM and emerging Non-Volatile Random Access Memory (eNVRAM) bitcells increase cache capacity and reduce power consumption by taking advantage of eNVRAM's small area footprint and low leakage energy. However, they also inhe ...

2020

Fast and Accurate Efficient Streaming Subgraph Isomorphism

Karl Aberer, Quoc Viet Hung Nguyen, Chi Thang Duong, Trung-Dung Hoang

Queries to detect isomorphic subgraphs are important in graph-based data management. While the problem of subgraph isomorphism search has received considerable attention for the static setting of a single query, or a batch thereof, existing approaches do n ...

2020

Successive Refinement to Caching for Dynamic Content

Michael Christoph Gastpar, Pinar Sen

To reduce the network load during peak hours, servers deliver partial data to users during the off-peak time of the network before the actual requests are known, which is known as caching. This paper studies a single user caching problem in which the file ...

IEEE2019

Fully-Asynchronous Cache-Efficient Simulation of Detailed Neural Networks

Felix Schürmann, Michael Lee Hines

Modern asynchronous runtime systems allow the re-thinking of large-scale scientific applications. With the example of a simulator of morphologically detailed neural networks, we show how detaching from the commonly used bulk-synchronous parallel (BSP) exec ...

SPRINGER INTERNATIONAL PUBLISHING AG2019

Relaxed Wyner's Common Information

Michael Christoph Gastpar, Erixhen Sula

In the problem of coded caching for media delivery, two separate coding opportunities have been identified. The first opportunity is a multi-user advantage and crucially hinges on a public broadcast link in the delivery phase. This has been explored in a p ...

IEEE2019

An Associativity-Agnostic in-Cache Computing Architecture Optimized for Multiplication

David Atienza Alonso, William Andrew Simon, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, Marco Antonio Rios

With the spread of cloud services and Internet of Things concept, there is a popularization of machine learning and artificial intelligence based analytics in our everyday life. However, an efficient deployment of these data-intensive services requires per ...

2019

Stop Crying Over Your Cache Miss Rate: Handling Efficiently Thousands of Outstanding Misses in FPGAs

Paolo Ienne, Mikhail Asiatici

FPGAs rely on massive datapath parallelism to accelerate applications even with a low clock frequency. However, applications such as sparse linear algebra and graph analytics have their throughput limited by irregular accesses to external memory for which ...

ASSOC COMPUTING MACHINERY2019

Improving Main-memory Database System Performance through Cooperative Multitasking

Georgios Psaropoulos

Database systems access memory either sequentially or randomly. Contrary to sequential access and despite the extensive efforts of computer architects, compiler writers, and system builders, random access to data larger than the processor cache has been s ...

EPFL2019