An Ultra-Low Power NVM-Based Multi-Core Architecture for Embedded Bio Signal Processing

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An Ultra-Low Power NVM-Based Multi-Core Architecture for Embedded Bio Signal Processing

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Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

Imaging sensor device using an array of single-photon avalanche diode photodetectors

Highly Parallel RTL Simulation

EdgeAI-Aware Design of In-Memory Computing Architectures

Integrated Wireless Power, Data Communication, and Thermal Sensing System for Autonomous Multisite Brain Implants

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

Acceleration of Control Intensive Applications on Coarse-Grained Reconfigurable Arrays for Embedded Systems

Exploring brain-inspired multi-core heterogeneous hardware templates for low-power biomedical embedded systems

Computational Imaging SPAD Cameras

Fast Parallel Algorithms for Enumeration of Simple, Temporal, and Hop-constrained Cycles

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

Post-Moore's Law Fusion: High-Bandwidth Memory, Accelerators, and Native Half-Precision Processing for CPU-Local Analytics

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Fast Parallel Algorithms for Enumeration of Simple, Temporal, and Hop-Constrained Cycles

Cooperative Concurrency Control for Write-Intensive Key-Value Workloads

Evaluating, Exploiting, and Hiding Power Side-Channel Leakage of Remote FPGAs

Programmable Silicon Nitride Photonic Integrated Circuits

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

REMOTE: Re-thinking Task Mapping on Wireless 2.5D Systems-on-Package for Hotspot Removal