Stretching Transactional Memory

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Stretching Transactional Memory

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Parallel Inverse Kinematics for Multithreaded Architectures

Applying HTM to an OLTP System: No Free Lunch

Efficient Communication and Synchronization on Manycore Processors

Building Evolvable Networks : Flexible and Predictable Packet Processing

Leveraging Hardware Message Passing for Efficient Thread Synchronization

Leveraging Hardware Message Passing for Efficient Thread Synchronization

ADDICT: Advanced Instruction Chasing for Transactions

Transactions Chasing Scalability and Instruction Locality on Multicores

Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage

Spatial Locality Speculation to Reduce Energy in Chip-Multiprocessor Networks-on-Chip

Scalable Simulation Methodologies for Many-Core Heterogeneous Systems

Ultra-Low Power Multicore Architecture For Parallel Biomedical Signal Processing