Meet the Walkers: Accelerating Index Traversals for In-Memory Databases

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Meet the Walkers: Accelerating Index Traversals for In-Memory Databases

Chat with Graph Search

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

Imaging sensor device using an array of single-photon avalanche diode photodetectors

Oligolithic Cross-task Optimizations across Isolated Workloads

Integrated Wireless Power, Data Communication, and Thermal Sensing System for Autonomous Multisite Brain Implants

On-Chip Fully Reconfigurable Artificial Neural Network in 16 nm FinFET for Positron Emission Tomography

EdgeAI-Aware Design of In-Memory Computing Architectures

Is the powersave governor really saving power?

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Highly Parallel RTL Simulation

Long plasma duration operation analyses with an international multi-machine (tokamaks and stellarators) database

Snowfall deposition in mountainous terrain: a statistical downscaling scheme from high-resolution model data on simulated topographies

Privacy-Preserving Machine Learning on Graphs

Chaosity: Understanding Contemporary NUMA-architectures

Exploring brain-inspired multi-core heterogeneous hardware templates for low-power biomedical embedded systems

CellCharter reveals spatial cell niches associated with tissue remodeling and cell plasticity

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

Overflow-free compute memories for edge AI acceleration

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Efficient Concurrent Analytical Query Processing using Data and Workload-conscious Sharing

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing