The growth of information technology has been sustained by the miniaturization of Complementary Metal-Oxide-Semiconductor (CMOS) Field-Effect Transistors (FETs), with the number of devices per unit area constantly increasing, as exemplified by Mooreâ s la ...
This paper reports a compact ambipolar model for homojunction strained-silicon (sSi) nanowire (NW) tunnel FETs (TFETs) capable of accurately describing both I-V and G-V characteristics in all regimes of operation, n- and p-ambipolarity, the superlinear ons ...
Institute of Electrical and Electronics Engineers2017
Conjugated polymers and small molecules are a promising class of semiconducting materials for application in macroelectronic and energy conversion devices. The development of high performance devices employing this class of semicrystalline materials ultima ...
A 3D vertically stacked silicon nanowire (SiNW) and Fin field effect transistor (FET) featuring a high density array (7 or 8 x 20 SiNWs, > 4 Fins vertically stacked) of fully depleted, ultra-thin (SiNWs diameters similar to 15-30 nm, Fin width/height fw si ...
We derived an analytical model for the junctionless double-gate metal-oxide-semiconductor field-effect transistor (DG MOSFET) device, the principle of which has been recently demonstrated. Despite some similarities with classical junction-based DG MOSFETs, ...
The quest for technologies with superior device characteristics has showcased Carbon Nanotube Field Effect Transistors (CNFETs) into limelight. Among the several design aspects necessary for today’s grail in CNFET technology, achieving functional immunity ...
This paper addresses the challenges and opportunities offered by post-CMOS devices in terms of new functionality and ultra low power. It focuses on the illustration of: (i) the quest for the new electronic abrupt switches (tunnel-FET and IMOS/PIMOS) and (i ...
Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2008
