Publications related to HALucinator: Firmware Re-hosting Through Abstraction Layer Emulation

Related publications (35)

Cross Layer Design for the Predictive Assessment of Technology-Enabled Architectures

There is great interest in "end-to-end" analysis that captures how innovation at the materials, device, and/or architectural levels will impact figures of merit at the application-level. However, there are numerous combinations of devices and architectures ...

IEEE2023

DatAFLow: Toward a Data-flow-guided Fuzzer

Mathias Josef Payer

This Replicating Computational Report (RCR) describes (a) our datAFLow fuzzer and (b) how to replicate the results in "datAFLow: Toward a Data-Flow-Guided Fuzzer." Our primary artifact is the datAFLow fuzzer. Unlike traditional coverage-guided greybox fuzz ...

2023

Visual question answering from another perspective: CLEVR mental rotation tests *

Sina Honari

Different types of mental rotation tests have been used extensively in psychology to understand human visual reasoning and perception. Understanding what an object or visual scene would look like from another viewpoint is a challenging problem that is made ...

ELSEVIER SCI LTD2023

Latency Interfaces for Systems Code

Rishabh Ramesh Iyer

This thesis demonstrates that it is feasible for systems code to expose a latency interface that describes its latency and related side effects for all inputs, just like the code's semantic interface describes its functionality and related side effects. S ...

EPFL2023

The LifeV library: engineering mathematics beyond the proof of concept

Simone Deparis, Luca Formaggia, Davide Forti

LifeV is a library for the finite element (FE) solution of partial differential equations in one, two, and three dimensions. It is written in C++ and designed to run on diverse parallel architectures, including cloud and high performance computing faciliti ...

2018

Cross-Platform Language Design

Sébastien Jean Robert Doeraene

Programming languages are increasingly compiled to multiple runtimes, each featuring their own rich structures such as their object model. Furthermore, they need to interact with other languages targeting said runtimes. A language targeting only one runtim ...

EPFL2018

Design and implementation of an optimizing type-centric compiler for a high-level language

Dmytro Petrashko

Production compilers for programming languages face multiple requirements. They should be correct, as we rely on them to produce code. They should be fast, in order to provide a good developer experience. They should also be easy to maintain and evolve. Th ...

EPFL2017

Squid: Type-Safe, Hygienic, and Reusable Quasiquotes

Christoph Koch, Amir Shaikhha, Lionel Emile Vincent Parreaux

Quasiquotes have been shown to greatly simplify the task of metaprogramming. This is in part because they hide the data structures of the intermediate representation (IR), instead allowing metaprogrammers to use the concrete syntax of the language they man ...

ACM2017

A Scalable and Secure System Architecture for Smart Buildings

Georgios Lilis

Recent years has seen profound changes in building technologies both in Europe and worldwide. With the emergence of Smart Grid and Smart City concepts, the Smart Building has attracted considerable attention and rapid development. The introduction of novel ...

EPFL2017

Type-Level Programming with Match Types

Martin Odersky, Olivier Eric Paul Blanvillain

Type-level programming is becoming more and more popular in the realm of functional programming. However, the combination of type-level programming and subtyping remains largely unexplored in practical programming languages. This paper presents match types ...

ASSOC COMPUTING MACHINERY2022

Unification of Compile-Time and Runtime Metaprogramming in Scala

Eugene Burmako

Metaprogramming is a technique that consists in writing programs that treat other programs as data. This paradigm of software development contributes to a multitude of approaches that improve programmer productivity, including code generation, program anal ...

EPFL2017

Semi-streaming algorithms for submodular matroid intersection

Ola Nils Anders Svensson, Paritosh Garg

While the basic greedy algorithm gives a semi-streaming algorithm with an approximation guarantee of 2 for the unweighted matching problem, it was only recently that Paz and Schwartzman obtained an analogous result for weighted instances. Their approach is ...

SPRINGER HEIDELBERG2022

Just-in-time Analytics Over Heterogeneous Data and Hardware

Manolis Karpathiotakis

Industry and academia are continuously becoming more data-driven and data-intensive, relying on the analysis of a wide variety of datasets to gain insights. At the same time, data variety increases continuously across multiple axes. First, data comes in mu ...

EPFL2017

A Synchronization-Based Hybrid-Memory Multi-Core Architecture for Energy-Efficient Biomedical Signal Processing

David Atienza Alonso, Luca Benini, Giovanni Ansaloni, Ruben Braojos Lopez

In the last decade, improvements on technology scaling have enabled the design of a novel generation of wearable bio-sensing monitors. These smart Wireless Body Sensor Nodes (WBSNs) are able to acquire and process biological signals, such as electrocardiog ...

Institute of Electrical and Electronics Engineers2017

Decrypting Local Type Inference

Hubert Plociniczak

Statically typed languages verify programs at compile-time. As a result many programming mistakes are detected at an early stage of development. A programmer does not have to specify types for every single term manually, however. Many programming languages ...

EPFL2016

Hardware/Software Co-Design of Ultra-Low Power Biomedical Monitors

Ruben Braojos Lopez

Ongoing changes in world demographics and the prevalence of unhealthy lifestyles are imposing a paradigm shift in healthcare delivery. Nowadays, chronic ailments such as cardiovascular diseases, hypertension and diabetes, represent the most common causes o ...

EPFL2016

Designing a Virtual Runtime for FPGA Accelerators in the Cloud

Paolo Ienne, Mikhail Asiatici, Nithin George

FPGAs can provide high performance and energy efficiency to many applications; therefore, they are attractive computing platforms in a cloud environment. However, FPGA application development requires extensive hardware design knowledge which significantly ...

Ieee2016

Three-Input Gates for Logic Synthesis

Giovanni De Micheli, Mathias Soeken, Heinz Riener, Eleonora Testa, Dewmini Sudara Marakkalage

Most logic synthesis algorithms work on graph representations of logic functions with nodes associated with arbitrary logic expressions or simple logic functions and iteratively optimize such graphs. While recent multilevel logic synthesis efforts focused ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

FPGAs for the Masses: Affordable Hardware Synthesis from Domain-Specific Languages

Nithin George

Field Programmable Gate Arrays (FPGAs) have the unique ability to be configured into application-specific architectures that are well suited to specific computing problems. This enables them to achieve performances and energy efficiencies that outclass oth ...

EPFL2016

Language Support for Distributed Functional Programming

Heather Christine Klug

Software development has taken a fundamental turn. Software today has gone from simple, closed programs running on a single machine, to massively open programs, patching together user experiences byway of responses received via hundreds of network requests ...

EPFL2015