Publications related to A multichannel 3.5mW/Gbps/channel gated oscillator based CDR in a 0.18µm digital CMOS technology

Related publications (25)

Rocker oscillator time bases

Since the invention of the pendulum clock by Christiaan Huygens in 1657, precision timekeepers have been regulated by oscillators. Although the pendulum is not an isochronous oscillator, its introduction as a time basis for clock regulation led to a signif ...

2021

L2 output feedback control of delayed linear parameter varying systems with piecewise constant parameters: A clock-dependent L-K approach

Muhammad Zakwan

This article proposes a new clock-dependent gain-scheduled dynamic output feedback controller for delayed linear parameter varying systems with piecewise constant parameters. The proposed controller guarantees Script capital L2-performance. By employing a ...

2021

Low-Power Design of Digital VLSI Circuits around the Point of First Failure

Andrea Bonetti

As an increase of intelligent and self-powered devices is forecasted for our future everyday life, the implementation of energy-autonomous devices that can wirelessly communicate data from sensors is crucial. Even though techniques such as voltage scaling ...

EPFL2019

Toward ultra-low power design methodology for frequency generation in the IoT design space

Mathieu Yves Hervé Coustans

Today, the semiconductor industry is feeding our digital world with more and more data coming from compact embedded electronics that are monitoring our environment and feeding analytics for action. Interaction with our digital world is mostly achieved thro ...

EPFL2019

A 6.5-GHz Cryogenic All-Pass Filter Circulator in 40-nm CMOS for Quantum Computing Applications

Edoardo Charbon, Andrea Ruffino, Yatao Peng

Cryogenic solid-state quantum processors require classical control and readout electronics; to achieve compactness and scalability, cryogenic integrated circuits have been recently proposed for this goal. Circulators are widely used in readout circuits, ho ...

2019

Adaptive Receiver Design for High Speed Optical Communication

Ilter Ozkaya

Conventional input/output (IO) links consume power, independent of changes in the bandwidth demand by the system they are deployed in. As the system is designed to satisfy the peak bandwidth demand, most of the time the IO links are idle but still consumin ...

EPFL2018

Ramsey-mode Rb cell clock demonstration with a 3D-printed microwave cavity

Anja Skrivervik

We demonstrate operation of a Ramey-mode Rb vapor-cell atomic clock based on a microwave cavity realized by additive manufacturing (3D-printing). The cavity design is based on a loop-gap approach and its critical electrode structure is realized in one mono ...

2018

An Energy Efficient Power Converter for Zero Power Wearable Devices

Milad Ataei Ashtiani

Early diagnosis of Alzheimer's and epilepsy requires monitoring a subject's development of symptoms through electroencephalography (EEG) signals over long periods. Wearable devices enable convenient monitoring of biosignals, unlike complex and costly hospi ...

EPFL2018

Automated Integration of Dual-Edge Clocking for Low-Power Operation in Nanometer Nodes

Andreas Peter Burg, Andrea Bonetti, Adam Shmuel Teman, Nicholas Alexander Preyss

Clocking power, including both clock distribution and registers, has long been one of the primary factors in the total power consumption of many digital systems. One straightforward approach to reduce this power consumption is to apply dual-edge-triggered ...

Association for Computing Machinery2017

Signaling in 3-D integrated circuits, benefits and challenges

Somayyeh Rahimian Omam

Three-dimensional (3-D) or vertical integration is a design and packaging paradigm that can mitigate many of the increasing challenges related to the design of modern integrated systems. 3-D circuits have recently been at the spotlight, since these circuit ...

EPFL2015

Clocks do not tick in unison: isolation of Clock and vrille shed new light on the clockwork model of the sand fly Lutzomyia longipalpis

Antonio Carlos Alves Meireles Filho

Background: Behavior rhythms of insect vectors directly interfere with the dynamics of pathogen transmission to humans. The sand fly Lutzomyia longipalpis is the main vector of visceral leishmaniasis in America and concentrates its activity around dusk. De ...

2015

Method for estimating and correcting a drift between clocks of receiving transceiver and a corresponding emitting transceiver, and receive for implementing said method

Jean-Yves Le Boudec, Ruben Merz

Method for estimating and correcting a frequency offset between a local clock of a receiving transceiver and a remote clock of an emitting transceiver comprises receiving by said receiving transceiver, a signal emitted by the emitting transceiver, said sig ...

2013

An Enhanced Design Methodology for Resonant Clock Trees

Giovanni De Micheli, Vasileios Pavlidis, Xifan Tang, Somayyeh Rahimian Omam

Clock distribution networks consume a considerable portion of the power dissipated by synchronous circuits. In conventional clock distribution networks, clock buffers are inserted to retain signal integrity along the long interconnects, which, in turn, sig ...

American Scientific Publishers2013

Timing Uncertainty in 3-D Clock Trees due to Process Variations and Power Supply Noise

Giovanni De Micheli, Xifan Tang, Vasileios Pavlidis, Hu Xu, Wayne Burleson

Clock distribution networks are affected by different sources of variations. The resulting clock uncertainty significantly affects the frequency of a circuit. To support this analysis, a statistical model of skitter, which consists of clock skew and jitter ...

Institute of Electrical and Electronics Engineers2013

Low-power clock distribution networks for 3-D ICs

Giovanni De Micheli, Vasileios Pavlidis, Somayyeh Rahimian Omam

Designing a low power clock network in synchronous circuits is an important task. This requirement is stricter for 3-D circuits due to the increased power densities. Resonant clock networks are considered efficient low-power alternatives to conventional cl ...

2012

A Low-Overhead Method for Pre-bond Test of Resonant 3-D Clock Distribution Networks

Giovanni De Micheli, Vasileios Pavlidis, Somayyeh Rahimian Omam

Designing a low power clock network in synchronous circuits is an important task. This requirement is stricter for 3-D circuits due to the increased power densities. Resonant clock networks are considered efficient low power alternatives to con- ventional ...

2012

Optically-Clocked Instruction Set Extensions for High Efficiency Embedded Processors

Edoardo Charbon, Claudio Favi, Ties Jan Henderikus Kluter, Christian Mester

We propose a technique to localize computation in Instruction Set Extensions (ISEs) that are clocked at very high speed with respect to the processor. In order to save power, data to and from Custom Instruction Units (CIUs) is synchronized via an optical s ...

2012

An Artificial Muscle Ring Oscillator

Dielectric elastomer artificialmuscles have great potential for the creation of novel pumps, motors, and circuitry. Control of these devices requires an oscillator, either as a driver or clock circuit, which is typically provided as part of bulky, rigid, a ...

2012

The Combined Effect of Process Variations and Power Supply Noise on Clock Skew and Jitter

Giovanni De Micheli, Vasileios Pavlidis, Hu Xu, Wayne Burleson

In modern VLSI circuits, a large number of clock buffers are inserted in clock distribution networks, which are significantly affected by process and power supply noise variations. The combined effect of process variations and power supply noise on clock s ...

Ieee2012

High-Level Energy Estimation in the Sub-VT Domain: Simulation and Measurement of a Cardiac Event Detector

Yusuf Leblebici, Omer Can Akgun

This paper presents a flow that is suitable to estimate energy dissipation of digital standard-cell based designs which are determined to operate in the subthreshold regime. The flow is applicable on gate-level netlists, where back-annotated toggle informa ...

2012