Integrated 4-terminal single-contact nanoelectromechanical relays implemented in a silicon-on-insulator foundry process

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Logic synthesis is a cornerstone of electronic design automation (EDA), facilitating the optimization of power, performance, and area (PPA) in integrated circuits. As complementary metal-oxide-semiconductor (CMOS) technology approaches its physical limitat ...

Epsilon-near-zero (ENZ) nanophotonic devices with zero permittivity are known to exhibit adiabatic frequency translation via temporal refraction under extracavity excitation by intense light sources, which are however hard to integrate on-chip owing to a h ...

MALTA is a depleted monolithic active pixel sensor (DMAPS) developed in the Tower Semiconductor 180-nm CMOS imaging process. Monolithic CMOS sensors offer advantages over current hybrid imaging sensors in terms of both increased tracking performance due to ...

Dynamically scheduled high-level synthesis can exploit high levels of parallelism in poorly-predictable control-dominated applications. Yet, dataflow circuits are often generated by literal conversion of basic blocks into circuits interconnected in such a ...

The 28 nm CMOS technology was selected as a promising candidate for upgrade of the electronics of particle detectors at CERN. Despite the robustness of this node to ultrahigh levels of total ionizing dose has been proven, the capability to withstand 1016 1 ...

Second-harmonic generation allows for coherently bridging distant regions of the optical spectrum, with applications ranging from laser technology to self-referencing of frequency combs. However, accessing the nonlinear response of a medium typically requi ...

In this work we explore the fabrication and experimental characterization of multi-gate FD-SOI devices that can operate both as single electron transistors (SETs) and MOSFETs. FD-SOI SET operation is achieved with electrostatically induced tunneling barrie ...

Large-scale patterning for vapor-liquid-solid growth of III-V nanowires is a challenge given the required feature size for patterning (45 to 60 nm holes). In fact, arrays are traditionally manufactured using electron-beam lithography,for which processing t ...

Lubricity, a phenomenon which enables the ease of motion of objects, and wear resistance, which minimizes material damage or degradation, are important fundamental characteristics for sustainable technology developments. Ultrathin coatings that promote lub ...

Integrated 4-terminal single-contact nanoelectromechanical relays implemented in a silicon-on-insulator foundry process

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Logic Synthesis and Optimization for CMOS and Post-CMOS Technologies

Intracavity Epsilon-Near-Zero Dual-Range Frequency Switch

Radiation Hardness of MALTA2, a Monolithic Active Pixel Sensor for Tracking Applications

Straight to the Queue: Fast Load-Store Queue Allocation in Dataflow Circuits

Neutron- and Proton-Induced Degradation of MOS Transistors in 28 nm CMOS Technology (September 2023)

A chip-scale second-harmonic source via self-injection-locked all-optical poling

Multi-Gate FD-SOI Single Electron Transistor for hybrid SET-MOSFET quantum computing

Dataset for "GaAs nanowires on Si nanopillars: towards large scale, phase-engineered arrays"

Angstrom-Scale Transparent Overcoats: Interfacial Nitrogen-Driven Atomic Intermingling Promotes Lubricity and Surface Protection of Ultrathin Carbon