Resource Sharing in Dataflow Circuits

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Program synthesis was first proposed a few decades ago, but in the last decade it has gained increased momentum in the research community. The increasing complexity of software has dictated the urgent need for improved supporting tools that verify the soft ...

Commercial high-level synthesis tools typically produce statically scheduled circuits. Yet, effective C-to-circuit conversion of arbitrary software applications calls for dataflow circuits, as they can handle efficiently variable latencies (e.g., caches) a ...

This paper presents new optimization approaches aiming at reducing the impact of memory accesses on the performance of dataflow programs. The approach is based on introducing a high level management of composite data types in dynamic dataflow programming l ...

We experimentally achieve optical time multiplexing of multiple Nyquist channels. A single microresonator Kerr comb allows the generation of multiple Nyquist sinc shaped pulse trains. TDM of pulse trains are obtained through wavelength conversion inside a ...

Large dataflow designs are a result of behavioral specification of modern complex digital systems and/or a result of unfolding and transforming looped and branched programs. Since deep-submicron silicon technology provides large amounts of available resour ...

When applications have unpredictable memory accesses or irregular control flow, dataflow circuits overcome the limitations of statically scheduled high-level synthesis (HLS). If memory dependences cannot be determined at compile time, dataflow circuits rel ...

Logic synthesis is a key component of digital design and modern EDA tools; it is thus an essential instrument for the design of leading-edge chips and to push the limits of their performance. In the last decades, the electronic circuits community has evolv ...

In this paper, the hardware acceleration of a tone-mapping algorithm for High-Dynamic-Range image processing is presented. Starting from the C++ source code, High-Level Synthesis has been performed using Xilinx SDSoC for a Xilinx Zynq SoC device. After an ...

In recent years, the number and variety of heterogeneous multiprocessor system-on-chip MPSoCs, such as for instance Zynq platforms, has sensibly increased. However, today all design flow solutions capable of programming the different components of such pla ...

Large dataflow designs appear as a result of functional specification of modern complex digital systems and/ or a result of unfolding and behavioral transformation of looped and branched programs. Since deep-submicron silicon technology provides large amou ...

Today, the design of electronic systems is largely automated. The practice of using software automation technologies for the design of electronic hardware is commonly referred to as Electronic Design Automation (EDA). EDA comprises a large set of tools, fr ...

The paper presents the results of design explorations for the implementation of the Smith-Waterman (S-W) algorithm executing DNA and protein sequences alignment. Both design explorations studies and the corresponding FPGA implementations are obtained by wr ...

Resource Sharing in Dataflow Circuits

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Scaling Functional Synthesis and Repair

Buffer Placement and Sizing for High-Performance Dataflow Circuits

Composite Data Types in Dynamic Dataflow Languages as Copyless Memory Sharing Mechanism

Experimental Generation and Time Multiplexing of Data-Carrying Nyquist Sinc Shaped Channels from a Single Microresonator-based Kerr Frequency Comb

Pipeline Synthesis and Optimization from Branched Feedback Dataflow Programs

Shrink It or Shed It! Minimize the Use of LSQs in Dataflow Designs

Data Structures and Algorithms for Logic Synthesis in Advanced Technologies

Hardware Acceleration of HDR-Image Tone Mapping on an FPGA-CPU Platform Through High-Level Synthesis

An Heterogeneous Compiler Of Dataflow Programs For Zynq Platforms

Efficient Dynamic Optimisation Heuristics for Dataflow Pipelines

SAT-Based Exact Synthesis for Multi-Level Logic Networks

High level synthesis of Smith-Waterman dataflow implementations