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New Data Structures and Algorithms for Logic Synthesis and Verification

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Thermo-optic epsilon-near-zero effects

Camille Sophie Brès, Marco Clementi, Jiaye Wu

Nonlinear epsilon-near-zero (ENZ) nanodevices featuring vanishing permittivity and CMOS-compatibility are attractive solutions for large-scale-integrated systems-on-chips. Such confined systems with unavoidable heat generation impose critical challenges fo ...

Nature Portfolio2024

On-Chip Fully Reconfigurable Artificial Neural Network in 16 nm FinFET for Positron Emission Tomography

Edoardo Charbon, Claudio Bruschini, Emanuele Ripiccini, Andrada Alexandra Muntean

Smarty is a fully-reconfigurable on-chip feed-forward artificial neural network (ANN) with ten integrated time-to-digital converters (TDCs) designed in a 16 nm FinFET CMOS technology node. The integration of TDCs together with an ANN aims to reduce system ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Active Voltage Balancing with Seamless Integration into Dual Gate Driver for Series Connection of SiC MOSFETs

Drazen Dujic, Rui Wang

The versatility of half-bridge configuration of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) power module contributes to its widespread adoption, highlighting the popularity and significance of its corresponding dual gat ...

2024

Controlling On-Surface Photoactivity: The Impact of π-Conjugation in Anhydride-Functionalized Molecules on a Semiconductor Surface

Christian Wäckerlin

On-surface synthesis has become a prominent method for growing low-dimensional carbon-based nanomaterials on metal surfaces. However, the necessity of decoupling organic nanostructures from metal substrates to exploit their properties requires either trans ...

Wiley-VCH Verlag GmbH2024

An Ultralow-Power Triaxial MEMS Accelerometer With High-Voltage Biasing and Electrostatic Mismatch Compensation

Kyojin Choo

This article presents a triaxial micro electromechani-cal system (MEMS) capacitive accelerometer using a high-voltage biasing technique to achieve high resolution with ultralow power. The accelerometer system generates a differential pair of high voltages ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Orthologic with Axioms

Viktor Kuncak, Simon Guilloud

We study the proof theory and algorithms for orthologic, a logical system based on ortholattices, which have shown practical relevance in simplification and normalization of verification conditions. Ortholattices weaken Boolean algebras while having polyno ...

Association for Computing Machinery2024

3D Printing of Customizable Transient Bioelectronics and Sensors

Danick Briand, Nicolas Francis Fumeaux

Transient electronics have emerged as a new category of devices that can degrade after their functional lifetime, offering tremendous potential as disposable sensors, actuators, wearables, and implants. Additive manufacturing methods represent a promising ...

2024

A Gradient-Gated SPAD Array for Non-Line-of-Sight Imaging

Edoardo Charbon, Francesco Gramuglia, Myung Jae Lee, Pouyan Keshavarzian, Jiuxuan Zhao

Time-resolved non-line-of-sight (NLOS) imaging based on single-photon avalanche diode (SPAD) detectors have demonstrated impressive results in recent years. To acquire adequate number of indirect photons from a hidden scene in the presence of overwhelming ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Single-Photon Avalanche Diode Image Sensors for Harsh Radiation Environments

Ming-Lo Wu

The space industry has experienced substantial growth in recent years, leading to rapid advancements in space exploration and space-based technologies. Consequently, the study of electronics and sensor performance in extreme environments has become crucial ...

EPFL2024

Doping Engineering for PDP Optimization in SPADs Implemented in 55-nm BCD Process

Edoardo Charbon, Claudio Bruschini, Myung Jae Lee, Wenfeng Liu

We introduce a new family of single-photon avalanche diodes (SPADs) with enhanced depletion regions in a 55-nm Bipolar-CMOS-DMOS (BCD) technology. We demonstrate how to systematically engineer doping profiles in the main junction and in deep p-well layers ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Extensions of Peer Prediction Incentive Mechanisms

Adam Julian Richardson

As large, data-driven artificial intelligence models become ubiquitous, guaranteeing high data quality is imperative for constructing models. Crowdsourcing, community sensing, and data filtering have long been the standard approaches to guaranteeing or imp ...

EPFL2024

EdgeAI-Aware Design of In-Memory Computing Architectures

Marco Antonio Rios

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

EPFL2024

Light-Intensity Switching of Graphene/WSe2 Synaptic Devices

Giulia Tagliabue, Tarique Anwar, Hongyu Tang

2D van der Waals heterojunctions (vdWH) have emerged as an attractive platform for the realization of optoelectronic synaptic devices, which are critical for energy-efficient computing systems. Photogating induced by charge traps at the interfaces indeed r ...

Wiley2024

Room-temperature quantum optomechanics using an ultralow noise cavity

Tobias Kippenberg, Guanhao Huang, Nils Johan Engelsen, Alberto Beccari

At room temperature, mechanical motion driven by the quantum backaction of light has been observed only in pioneering experiments in which an optical restoring force controls the oscillator stiffness1,2. For solid-state mechanical resonators in which oscil ...

Nature Portfolio2024

Eco-Conscious Approach to Wireless Gas Monitoring With a Hybrid Printed Passive Sensor Tag

Sandro Carrara, Johanna Zikulnig

Addressing the environmental impact of electronic waste in biomedical sensing, an eco-conscious approach to the realization of a Chitosan-based Acetone sensor tag for wireless gas monitoring is presented. The fabrication involves inkjet printing of silver ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Improving Standard-Cell Design Flow using Factored Form Optimization

Giovanni De Micheli, Alessandro Tempia Calvino

Factored form is a powerful multi-level representation of a Boolean function that readily translates into an implementation of the function in CMOS technology. In particular, the number of literals in a factored form correlates strongly with the number of ...

IEEE2023