Theory of Transactional Memory

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Theory of Transactional Memory

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Degrees of Separation: A Flexible Type System for Safe Concurrency

Oligolithic Cross-task Optimizations across Isolated Workloads

Formal Foundations of Capture Tracking

Highly Parallel RTL Simulation

Imaging sensor device using an array of single-photon avalanche diode photodetectors

One-shot Garbage Collection for In-memory OLTP through Temporality-aware Version Storage

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

When is it safe to run a transactional workload under Read Committed?

The splay-list: a distribution-adaptive concurrent skip-list

Dynamic Linkers Are the Narrow Waist of Operating Systems

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Capturing Types

Acceleration of Control Intensive Applications on Coarse-Grained Reconfigurable Arrays for Embedded Systems

Exploring brain-inspired multi-core heterogeneous hardware templates for low-power biomedical embedded systems

Chaosity: Understanding Contemporary NUMA-architectures

Design Space Exploration for Partitioning Dataflow Program on CPU-GPU Heterogeneous System

Cooperative Concurrency Control for Write-Intensive Key-Value Workloads

Post-Moore's Law Fusion: High-Bandwidth Memory, Accelerators, and Native Half-Precision Processing for CPU-Local Analytics

WarpAttack: Bypassing CFI through Compiler-Introduced Double-Fetches

HetCache: Synergising NVMe Storage and GPU acceleration for Memory-Efficient Analytics