Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.
DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.
In this letter, we report the performance of high-kappa/metal gate nanowire (NW) transistors without junctions fabricated with a channel thickness of 9 nm and sub-15-nm gate length and NW width. Near-ideal subthreshold slope (SS) and extremely low leakage currents are demonstrated for ultrascaled gate lengths with a high on-off ratio (I-on/I-off) > 10(6). For the first time, an SS lower than 70 mV/dec is achieved at L-G = 13 nm for n-type and p-type transistors, highlighting excellent electrostatic integrity of trigate junctionless NW MOSFETs.