Designing Best Effort Networks-on-Chip to Meet Hard Latency Constraints

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Designing Best Effort Networks-on-Chip to Meet Hard Latency Constraints

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An Iterative Adaptive Dynamic Programming Approach for Macroscopic Fundamental Diagram-Based Perimeter Control and Route Guidance

Social-Transmotion: Promptable Human Trajectory Prediction

GreenEVT: Greensboro Electric Vehicle Testbed

BiomedBench: A benchmark suite of TinyML biomedical applications for low-power wearables

Highly Parallel RTL Simulation

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

EdgeAI-Aware Design of In-Memory Computing Architectures

The Strong Integral Input-to-State Stability Property in Dynamical Flow Networks

A hybrid microscopic model for multimodal traffic with empirical observations from aerial footage

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Chaosity: Understanding Contemporary NUMA-architectures

Global, Passive Detection of Connection Tampering

Modeling and Optimization of Ridesplitting Operations

Worst-Case Delay Analysis of Time-Sensitive Networks with Network Calculus

Influence of outdoor air pollution on European residential ventilative cooling potential

Artificial Neural Network Training on an Optical Processor via Direct Feedback Alignment

Sub-kHz-Linewidth External-Cavity Laser (ECL) With Si3N4 Resonator Used as a Tunable Pump for a Kerr Frequency Comb

Cycling Interaction Rituals in the Conflict against the Car. From the Bike Subculture to the City Scale and Beyond

Localizing Traffic Differentiation

Haptics based collaborative steering control in automated driving environments