MPSoC Design using Application-Specific Architecturally Visible Communication

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Recent advances in machine learning have dramatically increased model size and computational requirements, increasingly straining computing system capabilities. This tension is particularly acute for resource-constrained edge scenarios, for which careful h ...

The recent rise in interest in point clouds as an imaging modality has motivated standardization groups such as JPEG and MPEG to launch activities aiming at developing compression standards for point clouds. Lossy compression usually introduces visual arti ...

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

The increasing demand for computing power and the emergence of heterogeneous computing architectures have driven the exploration of innovative techniques to address current limitations in both the compute and memory subsystems. One such solution is the use ...

Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

Enterprises collect data in large volumes and leverage them to drive numerous concurrent decisions and business processes. Their teams deploy multiple applications that often operate concurrently on the same data and infrastructure but have widely differen ...

Computer systems rely heavily on abstraction to manage the exponential growth of complexity across hardware and software. Due to practical considerations of compatibility between components of these complex systems across generations, developers have favou ...

The desire and ability to place AI-enabled applications on the edge has grown significantly in recent years. However, the compute-, area-, and power-constrained nature of edge devices are stressed by the needs of the AI-enabled applications, due to a gener ...

The invention relates to an Imaging sensor device in a stacked arrangement comprising: - a pixel array tier comprising a plurality of pixel segments each having a plurality of pixels for photon detection each providing a digital pixel output; - a processin ...

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

Machine learning algorithms such as Convolutional Neural Networks (CNNs) are characterized by high robustness towards quantization, supporting small-bitwidth fixed-point arithmetic at inference time with little to no degradation in accuracy. In turn, small ...

In the development of implantable bioelectronics, the establishment of efficient wireless RF links between implants and external nodes is crucial, providing substantial contributions to the advancement of medical diagnosis, therapies, and basic science. Im ...

Virtual Memory (VM) is a critical programming abstraction that is widely used in various modern computing platforms. With the rise of datacenter computing and birth of planet-scale online services, the semantic and capacity requirements from memory have ev ...

In this thesis, we explore techniques for addressing the communication bottleneck in data-parallel distributed training of deep learning models. We investigate algorithms that either reduce the size of the messages that are exchanged between workers, or th ...

Machine learning and data processing algorithms have been thriving in finding ways of processing and classifying information by exploiting the hidden trends of large datasets. Although these emerging computational methods have become successful in today's ...

Analytical engines rely on in-memory data caching to avoid storage accesses and provide timely responses by keeping the most frequently accessed data in memory. Purely frequency- and time-based caching decisions, however, are a proxy of the expected query ...

Accessing input data is a critical operation in data analytics: i) slow data access significantly degrades performance, and ii) storing everything in the fastest medium, i.e., memory, incurs high operational and hardware costs. Further, while GPUs offer in ...

The Joint Photographic Experts Group (JPEG) AI learning-based image coding system is an ongoing joint standardization effort between International Organization for Standardization (ISO), International Electrotechnical Commission (IEC), and International Te ...

Recent advances in image compression have made it both possible and desirable for image quality to approach the visually lossless range. However, the most commonly used subjective visual quality assessment protocols, e.g. those reported in ITU-T Rec. BT.50 ...

Modern hardware is increasingly complex, requiring increasing effort to understand in order to carefully engineer systems for optimal performance and effective utilization. Moreover, established design principles and assumptions are not portable to modern ...

MPSoC Design using Application-Specific Architecturally Visible Communication

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Keep All in Memory with Maxwell: a Near-SRAM Computing Architecture for Edge AI Applications

Subjective performance evaluation of bitrate allocation strategies for MPEG and JPEG Pleno point cloud compression

EdgeAI-Aware Design of In-Memory Computing Architectures

Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads

Highly Parallel RTL Simulation

Oligolithic Cross-task Optimizations across Isolated Workloads

Secure Interface Design Leveraging Hardware/Software Support

Exploring High-Performance and Energy-Efficient Architectures for Edge AI-Enabled Applications

Imaging sensor device using an array of single-photon avalanche diode photodetectors

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

DBFS: Dynamic Bitwidth-Frequency Scaling for Efficient Software-defined SIMD

Electromagnetic Radiation of Implantable Antennas

Rebooting Virtual Memory with Midgard

Communication-efficient distributed training of machine learning models

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

HPCache: memory-efficient OLAP through proportional caching revisited

HetCache: Synergising NVMe Storage and GPU acceleration for Memory-Efficient Analytics

The JPEG AI Standard: Providing Efficient Human and Machine Visual Data Consumption

On the assessment of high-quality images: advances on the JPEG AIC-3 activity

Chaosity: Understanding Contemporary NUMA-architectures