An Open-Hardware Coarse-Grained Reconfigurable Array for Edge Computing

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Embedded systems are deployed in security critical environments and have become a prominent target for remote attacks. Microcontroller-based systems (MCUS) are particularly vulnerable due to a combination of limited resources and low level programming whic ...

Atomic lock-free multi-word compare-and-swap (MCAS) is a powerful tool for designing concurrent algorithms. Yet, its widespread usage has been limited because lock-free implementations of MCAS make heavy use of expensive compare-and-swap (CAS) instructions ...

Smart edge sensors for bio-signal monitoring must support complex signal processing routines within an extremely small energy envelope. Coarse-Grained Reconfigurable Arrays (CGRAs) are good candidates for tackling these conflicting objectives because, than ...

Due to increased embedded processing requirements, modern SoCs are becoming heterogeneous computing platforms by combining traditional processing units with custom reconfigurable hardware accelerators (HAs) on an FPGA fabric. However, efficiently managing ...

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FPGA routing is one of the most time-consuming steps of FPGA compilation, often preventing fast edit-compile-test cycles in prototyping and development. There have been attempts to accelerate FPGA routing using algorithmic improvements, multi-core or multi ...

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An Open-Hardware Coarse-Grained Reconfigurable Array for Edge Computing

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mu RAI: Securing Embedded Systems with Return Address Integrity

Efficient Multi-Word Compare and Swap

i-DPs CGRA: An Interleaved-Datapaths Reconfigurable Accelerator for Embedded Bio-signal Processing

Snap-On User-Space Manager for Dynamically Reconfigurable System-on-Chips

Improving Main-memory Database System Performance through Cooperative Multitasking

Asynchronous Branch-Paralle Simulation of Detailed Neuron Models

Fully-Asynchronous Cache-Efficient Simulation of Detailed Neural Networks

Reconciling Being in-Control vs. Being Helped for the Execution of Complex Movements in VR

FPGA-Assisted Deterministic Routing for FPGAs

BLADE: A BitLine Accelerator for Devices on the Edge

A Real-Time Multi-Camera Depth Estimation ASIC with Custom On-Chip Embedded DRAM