Publications related to Data Structures and Algorithms for Data-Parallel Computing in a Managed Runtime

Related publications (19)

Highly Parallel RTL Simulation

Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

EPFL2024

Manticore: Hardware-Accelerated RTL Simulation with Static Bulk-Synchronous Parallelism

James Richard Larus, Sahand Kashani, Seyedmahyar Emami

The demise of Moore's Law and Dennard Scaling has revived interest in specialized computer architectures and accelerators. Verification and testing of this hardware depend heavily upon cycle-accurate simulation of register-transfer-level (RTL) designs. The ...

Assoc Computing Machinery2023

The splay-list: a distribution-adaptive concurrent skip-list

Dan Alistarh, Amirkeivan Mohtashami

The design and implementation of efficient concurrent data structures has seen significant attention. However, most of this work has focused on concurrent data structures providing good worst-case guarantees, although, in real workloads, objects are often ...

SPRINGER2023

Parallel MPC for Linear Systems With State and Input Constraints

Yuning Jiang

This letter proposes a parallelizable algorithm for linear-quadratic model predictive control (MPC) problems with state and input constraints. The algorithm itself is based on a parallel MPC scheme that has originally been designed for systems with input c ...

2022

System-level Design of Adaptive Wearable Sensors for Health and Wellness Monitoring

Elisabetta De Giovanni

In recent years, population aging and the consequent higher incidence of noncommunicable diseases, have increased the need for long-term health monitoring. Moreover, as healthcare cost is projected to grow substantially by 2030 in OECD countries, the deman ...

EPFL2021

Large-Scale Graph Processing on FPGAs with Caches for Thousands of Simultaneous Misses

Paolo Ienne, Mikhail Asiatici

Efficient large-scale graph processing is crucial to many disciplines. Yet, while graph algorithms naturally expose massive parallelism opportunities, their performance is limited by the memory system because of irregular memory accesses. State-of-the-art ...

IEEE COMPUTER SOC2021

Software Support for Non-Volatile Memory (NVM) Programming

David Teksen Aksun

Non-Volatile Memory (NVM) is an emerging type of memory device that provides fast, byte-addressable, and high-capacity durable storage. NVM sits on the memory bus and allows durable data structures designs similar to the in-memory equivalent ones. Expensiv ...

EPFL2021

Parallel and Scalable Bioinformatics

Stuart Anthony Byma

The field of genomics is likely to become the largest producer of data as a consequence of the large-scale application of next-generation sequencing technology for biological research and personalized medical treatments. The raw sequence data produced by t ...

EPFL2020

On Linear Learning with Manycore Processors

Martin Jaggi

A new generation of manycore processors is on the rise that offers dozens and more cores on a chip and, in a sense, fuses host processor and accelerator. In this paper we target the efficient training of generalized linear models on these machines. We prop ...

IEEE COMPUTER SOC2019

GPU-Accelerated Finite Volume Particle Simulation of Free Jet Deviation by Multi-jet Rotating Pelton Runner

Siamak Alimirzazadeh

Numerical simulation of Pelton turbine hydrodynamics is helpful to identify the energy loss mechanisms in the runner and minimize their effect. However, it is a challenging task that involves handling the unsteady free surface flow and moving boundaries re ...

EPFL2019

Object-Oriented Recovery for Non-volatile Memory

James Richard Larus, Nachshon Cohen, David Teksen Aksun

New non-volatile memory (NVM) technologies enable direct, durable storage of data in an application's heap. Durable, randomly accessible memory facilitates the construction of applications that do not lose data at system shutdown or power failure. Existing ...

ACM2018

High-Performance Communication Primitives and Data Structures on Message-Passing Manycores : Broadcast and Map

Omid Shahmirzadi

The constant increase in single core frequency reached a plateau during recent years since the produced heat inside the chip cannot be cooled down by existing technologies anymore. An alternative to harvest more computational power per die is to fabricate ...

EPFL2014

Inferring Scalability from Program Pseudocode

Mihai Letia

Recent trends have led hardware manufacturers to place multiple processing cores on a single chip, making parallel programming the intended way of taking advantage of the increased processing power. However, bringing concurrency to average programmers is c ...

EPFL2014

Randomized versus Deterministic Implementations of Concurrent Data Structures

Dan Alistarh

One of the key trends in computing over the past two decades has been increased distribution, both at the processor level, where multi-core architectures are now the norm, and at the system level, where many key services are currently distributed overmulti ...

EPFL2012

Asynchronous Broadcast on the Intel SCC using Interrupts

André Schiper, Thomas Ropars, Omid Shahmirzadi, Darko Petrovic

This paper focuses on the design of an asynchronous broadcast primitive on the Intel SCC. Our solution is based on OC-Bcast, a state-of-the-art k-ary tree synchronous broadcast algorithm that leverages the parallelism provided by on-chip Remote Memory Acce ...

2012

High-Performance RMA-Based Broadcast on the Intel SCC

André Schiper, Thomas Ropars, Omid Shahmirzadi, Darko Petrovic

Many-core chips with more than 1000 cores are expected by the end of the decade. To overcome scalability issues related to cache coherence at such a scale, one of the main research directions is to leverage the message-passing programming model. The Intel ...

2012

GPGPU-Accelerated Parallel and Fast Simulation of Thousand-core Platforms

David Atienza Alonso, Luca Benini, Martino Ruggiero, Shivani Raghav

The multicore revolution and the ever-increasing complexity of computing systems is dramatically changing system design, analysis and programming of computing platforms. Future architectures will feature hundreds to thousands of simple processors and on-ch ...

IEEE/ACM Press2011

A High–Performance Parallel Implementation of the Chambolle Algorithm

David Atienza Alonso, Abdulkadir Akin, Ivan Beretta, Alessandro Antonio Nacci

The determination of the optical flow is a central problem in image processing, as it allows to describe how an image changes over time by means of a numerical vector field. The estimation of the optical flow is however a very complex problem, which has be ...

ACM and IEEE Press2011

Portable and scalable parallelism for multi-core and reconfigurable hardware using dataflow programs

Marco Mattavelli, Ghislain Roquier

2011