Publication

Bitfiltrator: A general approach for reverse-engineering Xilinx bitstream formats

James Richard Larus, Sahand Kashani, Seyedmahyar Emami
2022
Conference Papers

Abstract

As the usage of FPGAs spreads, engineers will inevitably employ them in ways unforeseen-or unwanted-by their manufacturers. Xilinx's toolchains offer multiple points for customizing the FPGA compilation flow, but all flows must end with Vivado as it is the only tool capable of generating the bitstream to program an FPGA. Xilinx does not document its bitstream format, so users who wish to bypass Vivado and modify a bitstream directly must reverse-engineer it to discover the location and format of cells.

Official source

https://infoscience.epfl.ch/entities/publication/259a5b2a-b1de-48c3-8be8-f45c3a6fdde1

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Bitfiltrator: A general approach for reverse-engineering Xilinx bitstream formats

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