High-Performance RMA-Based Broadcast on the Intel SCC

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High-Performance RMA-Based Broadcast on the Intel SCC

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Sub-kHz-Linewidth External-Cavity Laser (ECL) With Si3N4 Resonator Used as a Tunable Pump for a Kerr Frequency Comb

Rebooting Virtual Memory with Midgard

Full System Exploration of On-Chip Wireless Communication on Many-Core Architectures

Reinforcement Learning-Based Joint Reliability and Performance Optimization for Hybrid-Cache Computing Servers

STEPS 4.0: Fast and memory-efficient molecular simulations of neurons at the nanoscale

Inter-actions parallel execution on GPU from high-level dataflow synthesis

Decentralized in-order execution of a sequential task-based code for shared-memory architectures

Sampling-Based AQP in Modern Analytical Engines

ACACIA: a new method to produce on-the-fly merger trees in the RAMSES code

Scalable Fine-Grained Parallel Cycle Enumeration Algorithms

Architecture Exploration and Optimization of Heterogeneous Many-Core Compute and Memory Architectures with Architectural Extensions

SIMD Parallel Execution on GPU from High-Level Dataflow Synthesis

Thermal and Voltage-Aware Performance Management of 3D MPSoCs with Flow Cell Arrays and Integrated SC Converters

How Many CPU Cores is an FPGA Worth? Lessons Learned from Accelerating String Sorting on a CPU-FPGA System