Inductive Supply for Highly Insulated Device

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

A fully CMOS compatible fabrication flow using low temperature a-Si LPCVD and stencil lithography has been developed and proved suitable for SiNW FinFETs having ambipolar conductance. The stencil mask has been demonstrated to be a real option for sub-micro ...

This paper presents new results on miniaturized organic thin film transistors (TFT) fabricated on a spin coated polyimide (PI) film. Patterning steps, that are vital for the integrity and electrical performances of the organic TFT, were performed using res ...

Interest in PVDF-TrFE copolymers as ferroelectric material for Memory application is driven by the prospect of having low cost, low operating voltage and fully organic device. Some previous studies reported FET designs using copolymers [refs 1,2] but none ...

For the past couple of decades the desire to add more complexity to a computer chip, while simultaneously reducing the cost per bit, has been accommodated by down-scaling. This approach has been extremely successful in the past, but like all good things it ...

Wafer-scale nanostencil lithography (nSL) is used to define several types of silicon mechanical resonators, whose dimensions range from 20 μm down to 200 nm, monolithically integrated with CMOS circuits. We demonstrate the simultaneous patterning by nSL of ...

The aim of this research is to develop and to evaluate devices and circuits performances based on ultrathin nanograin polysilicon wire (polySiNW) dedicated to room temperature operated hybrid CMOS-"nano" integrated circuits. The proposed polySiNW device is ...

Inductive Supply for Highly Insulated Device

Chat with Graph Search

Ambipolar silicon nanowire FETs with stenciled sub-µm metal gate

Organic Thin Film Transistors on Flexible Polyimide Substrates Fabricated by Full Wafer Stencil Lithography

1T Memory Cell Based on PVDF-TrFE Field Effect Transistor

Three-dimensional electronic devices fabricated on a top-down silicon nanowire platform

Full-wafer fabrication by nanostencil lithography of micro/nanomechanical mass sensors monolithically integrated with CMOS

Ultra-thin nanograin polysilicon devices for hybrid CMOS-NANO integrated circuits