Rethinking Secure FPGAs: Towards a Cryptography-friendly Configurable Cell Architecture and its Automated Design Flow

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Since the advent of internet and mass communication, two public-key cryptographic algorithms have shared the monopoly of data encryption and authentication: Diffie-Hellman and RSA. However, in the last few years, progress made in quantum physics -- and mo ...

In this paper, we propose Rocca-S, an authenticated encryption scheme with a 256-bit key and a 256-bit tag targeting 6G applications bootstrapped from AES. Rocca-S achieves an encryption/decryption speed of more than 200 Gbps in the latest software environ ...

Billions of people now have conversations daily over the Internet. A large portion of this communication takes place via secure messaging protocols that offer "end-to-end encryption'" guarantees and resilience to compromise like the widely-used Double Ratc ...

Current cryptographic solutions will become obsolete with the arrival of large-scale universal quantum computers. As a result, the National Institute of Standards and Technology supervises a post-quantum standardization process which involves evaluating ca ...

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Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

Cloud computing environments increasingly provision field-programmable gate arrays (FPGAs) for their programmability and hardware-level parallelism. While FPGAs are typically used by one tenant at a time, multitenant schemes supporting spatial sharing of c ...

In this paper, the design and experimental validation of a prototype phasor measurement unit (PMU) that simultaneously meets the P and M class requirements of the IEC/IEEE Std 60255-118-1-2018 are presented. The device is based on a synchrophasor estimatio ...

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With the looming threat of large-scale quantum computers, a fair portion of recent cryptographic research has focused on examining cryptographic primitives from the perspective of a quantum adversary. Shor's 1994 result revealed that quantum computers can ...

To answer the growing demand for hardware acceleration, Amazon, Microsoft, and many other major cloud service providers have included field-programmable gate arrays (FPGAs) in their datacenters. However, researchers have shown that cloud FPGAs, when shared ...

With Moore's law coming to an end, increasingly more hope is being put in specialized hardware implemented on reconfigurable architectures such as Field-Programmable Gate Arrays (FPGAs). Yet, it is often neglected that these architectures themselves experi ...

Side-channel attacks exploit a physical observable originating from a cryptographic device in order to extract its secrets. Many practically relevant advances in the field of side-channel analysis relate to security evaluations of cryptographic functions a ...

Many real-world group messaging systems delegate group administration to the application level, failing to provide formal guarantees related to group membership. Taking a cryptographic approach to group administration can prevent both implementation and pr ...

Commitment is a key primitive which resides at the heart of several cryptographic protocols. Noisy channels can help realize information-theoretically secure commitment schemes; however, their imprecise statistical characterization can severely impair such ...

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The spectral decomposition of cryptography into its life-giving components yields an interlaced network of tangential and orthogonal disciplines that are nonetheless invariably grounded by the same denominator: their implementation on commodity computing p ...

Rethinking Secure FPGAs: Towards a Cryptography-friendly Configurable Cell Architecture and its Automated Design Flow

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An Ultra-High Throughput AES-Based Authenticated Encryption Scheme for 6G: Design and Implementation

On the Theory and Practice of Modern Secure Messaging

Side-channel analysis of isogeny-based key encapsulation mechanisms and hash-based digital signatures

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Differentially private multi-agent constraint optimization

Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism

Highly Parallel RTL Simulation

X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don’t-Care Hardware Trojans to Shared Cloud FPGAs

Implementation and validation of a dual P- and M- class compliant PMU prototype based on the delayed in-quadrature interpolated DFT

Graph generative deep learning models with an application to circuit topologies

EdgeAI-Aware Design of In-Memory Computing Architectures

Security in the Presence of Quantum Adversaries

Temperature Impact on Remote Power Side-Channel Attacks on Shared FPGAs

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

The Side-channel Metrics Cheat Sheet

Cryptographic Administration for Secure Group Messaging

On the (Im)possibility of Commitment over Gaussian Unfair Noisy Channels

Making Classical (Threshold) Signatures Post-quantum for Single Use on a Public Ledger

Green Cryptography and Other Optimisations