Publications by Juan Pablo Sapriza Araujo

Related publications (7)

SAT-based Exact Modulo Scheduling Mapping for Resource-Constrained CGRAs

David Atienza Alonso, Giovanni Ansaloni, José Angel Miranda Calero, Benoît Walter Denkinger, Juan Pablo Sapriza Araujo, Ruben Rodriguez, Rubén Rodríguez Álvarez

Coarse-Grain Reconfigurable Arrays (CGRAs) represent emerging low-power architectures designed to accelerate Compute-Intensive Loops (CILs). The effectiveness of CGRAs in providing acceleration relies on the quality of mapping: how efficiently the CIL is c ...

2024

An MLIR-based Compilation Framework for CGRA Application Deployment

David Atienza Alonso, Giovanni Ansaloni, Lara Orlandic, Juan Pablo Sapriza Araujo, Yuxuan Wang, Rubén Rodríguez Álvarez

Coarse-Grained Reconfigurable Arrays (CGRAs) are a programmable architectural solution that efficiently supports the execution of computation-intensive application functions (kernels). Compilers for CGRAs typically focus on optimizing the mapping of single ...

2025

A Reconfigurable High Dynamic Range Delta-Sigma Front End with Event-Based Decimation for Bandwidth-EfficientImplantable Neural Interfaces

David Atienza Alonso, Giovanni Ansaloni, Pasquale Davide Schiavone, Juan Pablo Sapriza Araujo

As the demand for high channel counts and high-resolution recordings of neural activity continues to grow, the increased power and data rate generated impose hard constraints on the telemetry capabilities of wireless implantable neural interfaces. To addre ...

2025

A Reconfigurable High-Dynamic Range ∆Σ Front-End with Event-Based Decimation for Bandwidth-Efficient Implantable Neural Interfaces

David Atienza Alonso, Giovanni Ansaloni, Pasquale Davide Schiavone, Juan Pablo Sapriza Araujo

As the demand for high channel counts and high-resolution recordings of neural activity continues to grow, the increased power and data rate generated impose hard constraints on the telemetry capabilities of wireless implantable neural interfaces. To addre ...

IEEE2025

A flexible framework for early power and timing comparison of time-multiplexed CGRA kernel executions

David Atienza Alonso, Giovanni Ansaloni, Juan Pablo Sapriza Araujo

At the intersection between traditional CPU architectures and more specialized options such as FPGAs or ASICs lies the family of reconfigurable hardware architectures, termed Coarse-Grained Reconfigurable Arrays (CGRAs). CGRAs are composed of a 2-dimension ...

ACM2025

Performance evaluation of acceleration of convolutional layers on OpenEdgeCGRA

David Atienza Alonso, Pasquale Davide Schiavone, Juan Pablo Sapriza Araujo

Recently, efficiently deploying deep learning solutions on the edge has received increasing attention. New platforms are emerging to support the increasing demand for flexibility and high performance. In this work, we explore the efficient mapping of convo ...

Association for Computing Machinery, Inc2024

An Open-Hardware Coarse-Grained Reconfigurable Array for Edge Computing

David Atienza Alonso, Giovanni Ansaloni, José Angel Miranda Calero, Benoît Walter Denkinger, Juan Pablo Sapriza Araujo, Ruben Rodriguez, Rubén Rodríguez Álvarez

In this work, we propose an open-hardware low-power coarse-grained reconfigurable array connected to a lightweight microcontroller and enclosed in an application mapping framework. The latter provides complete support to configure kernels in the reconfigur ...

2023