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Canberk Sönmez

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Related publications (4)

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FlexiMem: Flexible Shared Virtual Memory for PCIe-attached FPGAs

Paolo Ienne, Canberk Sönmez, Mohamed Mahfouz Ahmed Kotb Shahawy, Cemalettin Cem Belentepe

Shared Virtual Memory (SVM) is a mechanism that allows host-side applications and FPGA accelerators to access the same virtual address space. It enables accelerating algorithms with unpredictable memory access patterns by making transparent pointer sharing ...

Institute of Electrical and Electronics Engineers Inc.2024

HardCilk: Cilk-like Task Parallelism for FPGAs

Paolo Ienne, Canberk Sönmez, Mohamed Mahfouz Ahmed Kotb Shahawy, Cemalettin Cem Belentepe

High-level synthesis (HLS) helps to develop hard-ware accelerators for field-programmable gate arrays (FPGAs) using C/C++ descriptions. HLS is tailored to exploit instruction-level parallelism and, where available, data-level parallelism in applications. Y ...

Institute of Electrical and Electronics Engineers Inc.2024

HBMex: An Attachment for Nonbursting Accelerators to Enhance HBM Performance

Paolo Ienne, Canberk Sönmez, Mohamed Mahfouz Ahmed Kotb Shahawy

Modern FPGAs integrate High Bandwidth Memory (HBM), offering up to 12× the DDR bandwidth distributed across multiple memory interfaces. To utilize the most of HBM's theoretical bandwidth, accelerators typically issue long bursts and exploit data locality. ...

Institute of Electrical and Electronics Engineers Inc.2025

Scale-out Systolic Arrays

Pascal Frossard, Babak Falsafi, Ahmet Caner Yüzügüler, Canberk Sönmez

Multi-pod systolic arrays are emerging as the architecture of choice in DNN inference accelerators. Despite their potential, designing multi-pod systolic arrays to maximize effective throughput/Watt-i.e., throughput/Watt adjusted when accounting for array ...

ASSOC COMPUTING MACHINERY2023