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Andreas Peter Burg

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Related publications (207)

Page 3 of 11

Energy versus Data Integrity Trade-Offs in Embedded High-Density Logic Compatible Dynamic Memories

Andreas Peter Burg, Georgios Karakonstantis, Pascal Andreas Meinerzhagen, Robert Giterman, Adam Shmuel Teman

Current variation aware design methodologies, tuned for worst-case scenarios, are becoming increasingly pessimistic from the perspective of power and performance. A good example of such pessimism is setting the refresh rate of DRAMs according to the worst- ...

2015

Ultra-Low Power Multicore Architecture For Parallel Biomedical Signal Processing

David Atienza Alonso, Andreas Peter Burg, Jeremy Hugues-Felix Constantin, Ahmed Yasir Dogan

A multi-core architecture with ultra-low power consumption is needed for a wide variety of applications, especially in the bio-medical domain. In this patent, an ultra-low power multi-core architecture is presented: it is composed of one or more cores, sev ...

2014

K-Best MIMO detection VLSI architectures achieving up to 424 mbps

Andreas Peter Burg

From an error rate performance perspective, maximum likelihood (ML) detection is the preferred detection method for multiple-input multiple-output (MIMO) communication systems. However, for high transmission rates a straight forward exhaustive search imple ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2006

Design for Test With Unreliable Memories by Restoring the Beauty of Randomness

Andreas Peter Burg, Reza Ghanaatian Jahromi, Marco Widmer

This article presents a design-for-test methodology for embedded memories. The methodology relies on a fully random fault model of post-fabrication errors, which results in a low-overhead test strategy. The methodology's effectiveness is demonstrated on an ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Adding Indoor Capacity without Fiber Backhaul: An mmWave Bridge Prototype

Andreas Peter Burg, Ruben Merz, Adrian Schumacher

Today, a large portion of mobile data traffic is consumed behind the shielding walls of buildings or in the Faraday cage of trains. This renders cellular network coverage from outdoor cell sites difficult. Indoor small cells and distributed antennas along ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Multi-Core Architecture Design for Ultra-Low-Power Wearable Health Monitoring Systems

David Atienza Alonso, Andreas Peter Burg, Martino Ruggiero, Jeremy Hugues-Felix Constantin, Ahmed Yasir Dogan

Personal health monitoring systems can offer a cost-effective solution for human healthcare. To extend the lifetime of health monitoring systems, we propose a near-threshold ultra-low- power multi-core architecture featuring low-power cores, yet capable of ...

ACM and IEEE Press2012

A 15.8 pJ/bit/iter quasi-cyclic LDPC decoder for IEEE 802.11n in 90 nm CMOS

Andreas Peter Burg, Christoph Studer, Pascal Andreas Meinerzhagen

We present a low-power quasi-cyclic (QC) low density parity check (LDPC) decoder that meets the throughput requirements of the highest-rate (600 Mbps) modes of the IEEE 802.11n WLAN standard. The design is based on the layered offset-min-sum algorithm and ...

IEEE2010

An Open-Source LoRa Physical Layer Prototype on GNU Radio

Andreas Peter Burg, Alexios Konstantinos Balatsoukas Stimming, Orion Afisiadis, Joachim Tobias Tapparel

LoRa is the proprietary physical layer (PHY) of LoRaWAN, which is a popular Internet-of-Things (IoT) protocol enabling low-power devices to communicate over long ranges. A number of reverse engineering attempts have been published in the last few years tha ...

IEEE2020

On the Exploitation of the Inherent Error Resilience of Wireless Systems under Unreliable Silicon

Andreas Peter Burg, Georgios Karakonstantis

In this paper, we investigate the impact of circuit misbehavior due to parametric variations and voltage scaling on the performance of wireless communication systems. Our study reveals the inherent error resilience of such systems and argues that sufficien ...

Ieee2012

Complexity-efficient Fano Decoding of Polarization-adjusted Convolutional (PAC) Codes

Andreas Peter Burg

Polarization-adjusted convolutional (PAC) codes are modified polar codes in which a one-to-one convolutional transformation is employed before the classical polar transform. Fano decoding of PAC codes in the Shannon lecture at ISIT2019 showed an outstandin ...

IEEE2020

Gain-Cell Embedded DRAMs: Modeling and Design Space

Andreas Peter Burg, Robert Giterman, Andrea Bonetti, Adam Shmuel Teman

Among the different types of DRAMs, gain-cell embedded DRAM (GC-eDRAM) is a compact, low-power and CMOS-compatible alternative to conventional SRAM. GC-eDRAM achieves high memory density as it relies on a storage cell that can be implemented with as few as ...

IEEE2020

A Generalized Adjusted Min-Sum Decoder for 5G LDPC Codes: Algorithm and Implementation

Andreas Peter Burg, Alexios Konstantinos Balatsoukas Stimming, Yifei Shen, Yuqing Ren, Hassan Harb

5G New Radio (NR) has stringent demands on both performance and complexity for the design of low-density parity-check (LDPC) decoding algorithms and corresponding VLSI implementations. Furthermore, decoders must fully support the wide range of all 5G NR bl ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Refresh-Free Dynamic Standard-Cell Based Memories: Application to a QC-LDPC Decoder

Andreas Peter Burg, Georgios Karakonstantis, Pascal Andreas Meinerzhagen, Andrea Bonetti

The area and power consumption of low-density parity check (LDPC) decoders are typically dominated by embedded memories. To alleviate such high memory costs, this paper exploits the fact that all internal memories of a LDPC decoder are frequently updated w ...

2015

Regularized frequency domain equalization algorithm and its VLSI implementation

Andreas Peter Burg

Approximation of Toeplitz matrices with circulant matrices is a well-known approach to reduce the computational complexity of linear equalizers. This paper presents a novel technique to compute linear equalizer coefficients in the frequency domain. It is s ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2007

Monostatic Multi-Target Wi-Fi-Based Breathing Rate Sensing Using Openwifi

Andreas Peter Burg, Andreas Toftegaard Kristensen, Sitian Li

Continuous monitoring of human activity and vital signs has become increasingly important in healthcare and consumer applications. While wearables and others sensors are already in widespread use, they often suffer from issues such as discomfort and the ne ...

Institute of Electrical and Electronics Engineers Inc.2024

Replica Technique for Adaptive Refresh Timing of Gain-Cell-Embedded DRAM

Andreas Peter Burg, Adam Shmuel Teman, Pascal Andreas Meinerzhagen, Robert Giterman

Gain cells have recently been shown to be a viable alternative to static random access memory in low-power applications due to their low leakage currents and high density. The primary component of power consumption in these arrays is the dynamic power cons ...

Institute of Electrical and Electronics Engineers2014

Statistical Fault Injection for Impact-Evaluation of Timing Errors on Application Performance

Andreas Peter Burg, Jeremy Hugues-Felix Constantin, Georgios Karakonstantis

This paper proposes a novel approach to modeling of gate level timing errors during high-level instruction set simulation. hi contrast to conventional, purely random fault injection, our physically motivated approach directly relates to the underlying circ ...

Ieee2016

ComplexBeat: Breathing Rate Estimation from Complex CSI

Andreas Peter Burg, Alexios Konstantinos Balatsoukas Stimming, Andreas Toftegaard Kristensen, Sitian Li

In this paper, we explore the use of channel state information (CSI) from a WiFi system to estimate the breathing rate of a person in a room. In order to extract WiFi CSI components that are sensitive to breathing, we propose to consider the delay domain c ...

IEEE, ELECTRON DEVICES SOC & RELIABILITY GROUP2021

Standard-Cell Based Memories (SCMs): from Sub-VT to Error-Resilient Systems

Andreas Peter Burg, Pascal Andreas Meinerzhagen

Embedded memories consume an increasingly dominant part of the overall area and power of a large variety of systems-on-chip [ITRS’09]: 1) biomedical implants and wireless sensor networks require robust memories operating in the sub-VT domain; 2) many handh ...

2012

A Node-Based Polar List Decoder With Frame Interleaving and Ensemble Decoding Support

Xinwei Li, Andreas Peter Burg, Yifei Shen, Yuqing Ren, Ludovic Damien Blanc, Leyu Zhang

Node-based successive cancellation list (SCL) decoding has received considerable attention in wireless communications for its significant reduction in decoding latency, particularly with 5G New Radio (NR) polar codes. However, the existing node-based SCL d ...

2024