Publications by Maher Kayal | EPFL Graph Search

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Most medium and large commercial buildings in the U.S. are subject to complex electricity tariffs that combine both Time-of-Use (TOU) energy and demand charges. This study analyses the performances of different economic Model Predictive Control (MPC) formu ...

This paper presents an equivalent electrical circuit for one dimensional substrate minority carriers spice simulation. The electrical circuit parameters are extracted from substrate meshing applying the finite difference method. This model is derived from ...

This paper presents a Hall sensor microsystem output and sensitivity calibration targeting low drift (

Typical Low Dropout Voltage regulators (LDO), uses an error amplifier in a linear closed loop. The main advantage of such linear regulators is the low standby current due to the absence of switching. In addition, a fully integrated linear regulator with no ...

This paper presents a solar charger ASIC for Nickelbased (NiCd or NiMH) batteries. The system is fully integrated and no external component is needed. The ASIC includes a voltage reference, a low-impedance switch, an oscillator, a poweron reset, and a digi ...

This paper proposes and validates a Discrete Event Simulation (DES) engine for the Smart-Building (SB). It strives to virtualize the common elements found within it and integrates them transparently to an existing Building Management System (BMS), along wi ...

This paper presents a new Procedural Analog Design tool called PAD. It is a chart-based design environment dedicated to the design of analog circuits aiming to optimise design and quality by finding good tradeoffs. This interactive tool allows step-by-step design of analog cells by using guidelines for each analog topology. At each step, the user modifies interactively one subset of design parameters and observes the effect on other circuit parameters. At the end, an optimised design is ready for simulation

Today circuit failures in Smart Power ICs due to substrate couplings are partially addressed during the circuit design phase. The state-of-the-art guidelines for the optimization of parasitic couplings provide mainly qualitative rules, which are difficult ...

We present the design of a wide dynamic-range CMOS A/D interface circuit for ionization chambers, able to digitize input charge of both polarities over six decades, to operate in a radioactive environment, and foreseen working without calibration. The circ ...

This research presents a discrete-time transmission line model based on the propagation of travelling waves. In this approach, the transmission line is emulated by means of many interconnected unit delay cells implemented with switched-capacitor (SC) circu ...

Standard static CMOS logic is responding to the requirement of high frequency and low power of digital systems. However, the digital switching noise generated by this logic is not suited for the design of performance mixed-signal integrated systems. In mixed-signal application the analog functionality can be affected by this digital switching noise and therefore resolution is degraded. The Current Steering Logic (CSL) is one of the well-known techniques capable of decreasing the switching noise [1,2]. Despi

Despite an evermore complete plethora of complex domain-specific semiempirical models, no succinct recipe for large-scale carbon nanotube electromechanical systems design has been formulated. To combine the benefits of these highly sensitive miniaturized m ...

A new type of CMOS compatible photodetector, exhibiting intrinsic light-to-time conversion, is proposed. Its main objective is to start the time-to-digital conversion directly at its output, thereby avoiding the cumbersome analog processing. The operation ...

A measurement method is reported to distinguish the different mechanisms that lead to image lag in image sensors based on pinned photodiodes (PPDs). This new method can differentiate between the lag caused by a potential barrier or pocket and gate traps in ...

To perform a current sensing in capacitorless 1-transistor (IT) DRAMs on SOI, we have developed a sensing scheme with automatic reference generation. The reference current is generated by an adjustable current source. The electrical calibration of the refe ...

An analog electronics emulation solution is investigated in order to assess the state of a power system facing dynamic phenomena such as the transient stability. Two approaches are studied: DC emulation and AC emulation. Both are intended to be integrated ...

In this Letter, a direct light-to-digital converter based on an MOS-PN photodetector driven by pulsed voltage is presented. The objective is to avoid any analog-to-digital or time-to-digital conversion and, thereby, to pave the way for a new generation of ...

This paper presents an innovative 3D hardware architecture for power system dynamic and transient stability. Based on an intrinsic parallel architecture by means of mixedsignal circuits (analog and digital) it overcomes the speed of numerical simulators fo ...

When designing in Smart Power technologies, TCAD simulations are mandatory to design effective passive protections against parasitic couplings due to minority carriers. The objective of this paper is to propose a spice-based approach to characterize electr ...

In this paper, an ultra-low power consumption crystal oscillator embedded in an RTC module (ASIC and its crystal resonator) is presented. The technique leverages oscillation amplitude and loads capacitance scaling; it incorporates transistor level merging ...

Maher Kayal

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Comparison of MPC Formulations for Building Control under Commercial Time-of-Use Tariffs

Spice Simulation of Substrate Minority Carriers Propagation with Equivalent Electrical Circuit

A Hall sensor microsystem with integrated voltage and current references for continuous sensitivity calibration

New error amplifier topology for Low Dropout Voltage regulators using compound OTA-OPAMP

A fully integrated solar battery charger

Building Virtualization Engine: a Novel Approach Based on Discrete Event Simulation

Procedural Analog Design (PAD) tool

Simulation, Analysis, and Verification of Substrate Currents for Layout Optimization of Smart Power ICs

A 20-bit dynamic range CMOS A/D converter for ionization chambers

Switched-capacitor high-speed emulator for real-time fault location in electrical power systems

Automatic design tool for submicron current steering logic libraries

System-Level Design Considerations for Carbon Nanotube Electromechanical Resonators

Hybrid MOS-PN photodiode with positive feedback for pulse-modulation imaging

Experimental Analysis of Lag Sources in Pinned Photodiodes

Capacitorless 1T DRAM sensing scheme with automatic reference generation

Toward a power system emulation using analog microelectronics solid state circuits

Toward direct light-to-digital conversion using a pulse-driven hybrid MOS-PN photodetector

A 3D architecture platform dedicated to high-speed computation for power system

Spice Simulation of Passive Protection in Smart Power ICs

A 32kHz crystal oscillator leveraging voltage scaling in an ultra-low power 40nA real-time clock