Lecture

Inputs and Outputs: Peripheral Communication

Graph Chat

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

Description

This lecture covers the basics of accessing peripherals, including input/output devices such as keyboard, mouse, and printer. It explains memory-mapped I/O addressing modes and demonstrates examples of memory-mapped interfaces and programmed I/Os. The lecture also delves into I/O polling, interrupts, interrupt priorities, and direct memory access (DMA) for efficient data transfers.

This video is available exclusively on Mediaspace for a restricted audience. Please log in to MediaSpace to access it if you have the necessary permissions.

Watch on Mediaspace

Official source

Ontological neighbourhood

Computer engineering

High-performance computing: Real-time computing

Related concepts (32)

Interrupt

In digital computers, an interrupt (sometimes referred to as a trap) is a request for the processor to interrupt currently executing code (when permitted), so that the event can be processed in a timely manner. If the request is accepted, the processor will suspend its current activities, save its state, and execute a function called an interrupt handler (or an interrupt service routine, ISR) to deal with the event.

Interrupt handler

In computer systems programming, an interrupt handler, also known as an interrupt service routine or ISR, is a special block of code associated with a specific interrupt condition. Interrupt handlers are initiated by hardware interrupts, software interrupt instructions, or software exceptions, and are used for implementing device drivers or transitions between protected modes of operation, such as system calls. The traditional form of interrupt handler is the hardware interrupt handler.

Programmable interrupt controller

In computing, a programmable interrupt controller (PIC) is an integrated circuit that helps a microprocessor (or CPU) handle interrupt requests (IRQ) coming from multiple different sources (like external I/O devices) which may occur simultaneously. It helps prioritize IRQs so that the CPU switches execution to the most appropriate interrupt handler (ISR) after the PIC assesses the IRQ's relative priorities. Common modes of interrupt priority include hard priorities, rotating priorities, and cascading priorities.

Non-maskable interrupt

In computing, a non-maskable interrupt (NMI) is a hardware interrupt that standard interrupt-masking techniques in the system cannot ignore. It typically occurs to signal attention for non-recoverable hardware errors. Some NMIs may be masked, but only by using proprietary methods specific to the particular NMI. An NMI is often used when response time is critical or when an interrupt should never be disabled during normal system operation.

Interrupt latency

In computing, interrupt latency refers to the delay between the start of an Interrupt Request (IRQ) and the start of the respective Interrupt Service Routine (ISR). For many operating systems, devices are serviced as soon as the device's interrupt handler is executed. Interrupt latency may be affected by microprocessor design, interrupt controllers, interrupt masking, and the operating system's (OS) interrupt handling methods. There is usually a trade-off between interrupt latency, throughput, and processor utilization.

Related lectures (64)

Process Protection and Efficient Execution

Explores process execution, protection, and efficient OS mechanisms for secure and reliable multi-program environments.

IO Devices: Interaction and Performance

Covers the interaction between operating systems and IO devices, focusing on hardware fundamentals and performance implications.

Microcontrollers Fundamentals

Covers microcontrollers fundamentals, including operations, pointers, interrupts, and interrupt handling.

Interrupts: Principles and Implementation

Explores the principles and implementation of interrupts in microcontrollers, covering motivation, sources, and practical examples.

Timers and Counters: Architecture and Applications