Lecture

CS Stage: Load and Linearization

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In course

EE-320: Analog IC design

Introduction to the design of analog CMOS integrated circuits at the transistor level. Understanding and design of basic structures. ...

Description

This lecture covers the design considerations for achieving a large voltage gain in a single stage by increasing the load impedance of the CS stage, replacing the load with a current source, and using an active load. It also discusses the impact of source degeneration on linearity and gain, as well as the behavior of a MOS device in the triode region as a resistor. The nonlinear dependence of the drain current on overdrive is explored, along with techniques to linearize the input device. Various equations and practical approaches are presented to optimize the performance of CS stages.

Instructor

Mahsa Shoaran

Official source

Ontological neighbourhood

Physics

Electromagnetism: Electrical networks

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