Computer architecture simulator

A computer architecture simulator is a program that simulates the execution of computer architecture. Computer architecture simulators are used for the following purposes: Lowering cost by evaluating hardware designs without building physical hardware systems. Enabling access to unobtainable hardware. Increasing the precision and volume of computer performance data. Introducing abilities that are not normally possible on real hardware such as running code backwards when an error is detected or running in faster-than-real time. Computer architecture simulators can be classified into many different categories depending on the context. Scope: Microarchitecture simulators model the microprocessor and its components. Full-system simulators also model the processor, memory systems, and I/O devices. Detail: Functional simulators, such as instruction set simulators, achieve the same function as modeled components. They can be simulated faster if timing is not considered. Timing simulators are functional simulators that also reproduce timing. Timing simulators can be further categorized into digital cycle-accurate and analog sub-cycle simulators. Workload: Trace-driven simulators (also called event-driven simulators) react to pre-recorded streams of instructions with some fixed input. Execution-driven simulators allow dynamic change of instructions to be executed depending on different input data. A full-system simulator is execution-driven architecture simulation at such a level of detail that complete software stacks from real systems can run on the simulator without any modification. A full system simulator provides virtual hardware that is independent of the nature of the host computer. The full-system model typically includes processor cores, peripheral devices, memories, interconnection buses, and network connections. Emulators are full system simulators that imitate obsolete hardware instead of under development hardware.