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Concept

IA-64

Related publications (16)

Enclosure: Language-Based Restriction of Untrusted Libraries

Mathias Josef Payer, James Richard Larus, Edouard Bugnion, Evangelos Marios Kogias, Adrien Ghosn

Programming languages and systems have failed to address the security implications of the increasingly frequent use of public libraries to construct modern software. Most languages provide tools and online repositories to publish, import, and use libraries ...

ACM2021

A Fast, Reliable and Wide-voltage-range In-memory Computing Architecture

David Atienza Alonso, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, William Andrew Simon

In-Memory Computing (IMC) solutions, and particularly bitline computing in SRAM, appear promising as they mitigate one of the most energy consuming aspects in computation: data movement. In this work we propose a fast (2.4Ghz for bitwise operations and 2.4 ...

Association for Computing Machinery2019

RRAM Crossbar Arrays for Storage Class Memory Applications : Throughput and Density Considerations

Alexandre Sébastien Julien Levisse

As more and more high density memories are required to satisfy the Internet of Things ecosystem, academics and industrials are looking for an intermediate solution to fill the gap between DRAM and Flash NAND in the memory hierarchy. The emergence of Resist ...

2018

Transactions Chasing Scalability and Instruction Locality on Multicores

Pinar Tözün

For several decades, online transaction processing (OLTP) has been one of the main server applications that drives innovations in the data management ecosystem, and in turn the database and computer architecture communities. Recent hardware trends oblige s ...

EPFL2014

Improved Linear Cryptanalysis of Reduced-Round MIBS

Serge Vaudenay, Asli Bay, Jialin Huang

MIBS is a 32-round lightweight block cipher with 64-bit block size and two different key sizes, namely 64-bit and 80-bit keys. Bay et al. provided the first impossible differential, differential and linear cryptanalyses of MIBS. Their best attack was a lin ...

Springer2014

The cosmological impact of intrinsic alignment model choice for cosmic shear

Anaïs Marie Rassat

We consider the effect of galaxy intrinsic alignments (IAs) on dark energy constraints from weak gravitational lensing. We summarize the latest version of the linear alignment model of IAs, following a brief note of Hirata & Seljak and further interpretati ...

Blackwell Publishing Ltd, Oxford2012

Making Wide-Issue VLIW Processors Viable on FPGAs

Paolo Ienne, Madhura Purnaprajna

Soft and highly-customized processors are emerging as a common way to efficiently control large amount of computing resources available on FPGAs. Yet, some processor architectures of choice for DSP and media applications, such as wide-issue VLIW processors ...

2012

Why Nothing Matters: The Impact of Zeroing

Memory safety defends against inadvertent and malicious misuse of memory that may compromise program correctness and security. A critical element of memory safety is zero initialization. The direct cost of zero initialization is surprisingly high: up to 12 ...

2011

Why STM can be more than a Research Toy

Rachid Guerraoui, Vincent Gramoli, Aleksandar Dragojevic

Software Transactional Memory (STM) promises to simplify concurrent programming without requiring specific hardware support. Yet, STM’s credibility lies on the extent to which it enables to leverage multicores and outperform sequential code. A recent CACM ...

2011

Thermal-Aware Compilation for Register Window-Based Embedded Processors

David Atienza Alonso, Mohamed Mostafa Sabry Aly

The development of compiler-based mechanisms to optimize the thermal profile of large register files to improve the processor reliability has become an important issue. Thermal hotspots have been known to cause severe reliability issues, while the thermal ...

Institute of Electrical and Electronics Engineers2010

Performance and Energy Trade-offs Analysis of L2 on-Chip Cache Architectures for Embedded MPSoCs

Martino Ruggiero, Mohamed Mostafa Sabry Aly, Pablo Garcia del Valle

On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multi-processor systems. Following the trend set by high-performance processors, high-end embedded cores are moving from single-level on chip ...

2010

A New Look at the Roles of Spinning and Blocking

Anastasia Ailamaki, Frederick Ryan Johnson, Radu Ioan Stoica, Manoussos Gavriil Athanassoulis

Database engines face growing scalability challenges as core counts exponentially increase each processor generation, and the efficiency of synchronization primitives used to protect internal data structures is a crucial factor in overall database performa ...

2009

Joint Hardware-Software Leakage Minimization Approach for the Register File of VLIW Embedded Architectures

Giovanni De Micheli, David Atienza Alonso, José Luis Ayala Rodrigo

New applications demand very high processing power when run on embedded systems. Very Long Instruction Word (VLIW) architectures have emerged as a promising alternative to provide such processing capabilities under the given energy budget. However, in this ...

2008

An Analysis of Database System Performance on Chip Multiprocessors

Anastasia Ailamaki, Babak Falsafi, Frederick Ryan Johnson, Ippokratis Pandis

Prior research shows that database system performance is dominated by off-chip data stalls, resulting in a concerted effort to bring data into on-chip caches. At the same time, high levels of integration have enabled the advent of chip multiprocessors and ...

2007

Database Servers on Chip Multiprocessors: Limitations and Opportunities

Anastasia Ailamaki, Babak Falsafi, Frederick Ryan Johnson, Ippokratis Pandis

2007

A Portable Kernel Abstraction for Low-Overhead Ephemeral Mapping Management

Willy Zwaenepoel

Modern operating systems create ephemeral virtual-to-physical mappings for a variety of purposes, ranging from the implementation of interprocess communication to the implementation of process tracing and debugging. With succeeding generations of processor ...

2005