Ander Audikana ArriolaBio
Ander Audikana is a postdoctoral research fellow at Lasur conducting research on European mobility and transport policy. Ander received a PhD in Sociology from Paris-Est University in July 2012 with a dissertation on the politics of high-speed rail in Spain. Between August 2012 and April 2013, Ander was Fulbright-Schuman scholar at George Mason University and University of California, Berkeley. He holds a Master in City and Regional Plannning from University Paris 12 and Sociology degrees both from Écol
Jean-Marc OdobezExpertise
Computer Vision, machine Learning (Bayesian models, deep learning), multimodal processing.Activity analysis, human behavior understanding, human communication, interaction modeling
Dr Jean-Marc Odobez (Msc 1990, PhD 1994) received his Ph.D degree from Rennes University in 1994 for his PhD dissertation done at INRIA. After 5 years as an assistant professor at the University du Maine, France, he decided to join Idiap, where he is now the Head of the Perception & Activity Understanding Group and adju
Sanidhya KashyapSanidhya Kashyap is a systems researcher and an assistant professor at the EPFL School of Computer and Communication Sciences (IC). His research focuses on designing systems software that are performant and robust for heterogeneous hardware. He is broadly interested in the area of systems with a particular focus on operating systems, databases, concurrency, scheduling, networks, data analytics, and software testing (fuzzing).
Babak FalsafiBabak is a Professor in the School of Computer and Communication Sciences and the founding director of the EcoCloud, an industrial/academic consortium at EPFL investigating scalable data-centric technologies. He has made numerous contributions to computer system design and evaluation including a scalable multiprocessor architecture which was prototyped by Sun Microsystems (now Oracle), snoop filters and memory streaming technologies that are incorporated into IBM BlueGene/P and Q and ARM cores, and computer system performance evaluation methodologies that have been in use by AMD, HP and Google PerKit . He has shown that hardware memory consistency models are neither necessary (in the 90's) nor sufficient (a decade later) to achieve high performance in multiprocessor systems. These results eventually led to fence speculation in modern microprocessors. His latest work on workload-optimized server processors laid the foundation for the first generation of Cavium ARM server CPUs, ThunderX. He is a recipient of an NSF CAREER award, IBM Faculty Partnership Awards, and an Alfred P. Sloan Research Fellowship. He is a fellow of IEEE and ACM.
Aude BillardExpertise
RoboticsMachine LearningArtificial IntelligenceHuman-Robot InteractionMechatronicsDynamical Systems ControlComputational Neuroscience
Aude Billard is full professor and head of the LASA laboratory at the School of Engineering at the Swiss Institute of Technology Lausanne (EPFL), and the Director of the Swiss Innovation Booster on Robotics. Dr. Billard acts as the President of the IEEE Robotics and Automation Society (RAS), after serving in several roles in the administrative and executive committe
Annechien Sarah HelsdingenDr. Anne Helsdingen works as course developer and project manager, developing massive open online courses at the center for digital education from EPFL in Lausanne. Anne has nearly 20 years of experience in human factors research, training and training development, academic teaching and (research) management. Her experience in training and education is rich and varied and includes training critical thinking strategies to various civil and military organizations; designing training programs for military aircrews; developing specifications for artillery training simulators; design, develop and conduct blended learning programs for military commanders; and teaching psychology to bachelor and master students. Anne’s research focuses on learning complex cognitive skills such as reflection, critical thinking and decision-making. She has worked in many international multi-disciplinary research teams, commissioned, for instance, by NATO Research and Technology Organisation or the European Union. Having worked both in academia and in contract research provides her with ample experience in both applied and more fundamental research projects. In her pervious role as research director for Effat University in Saudi Arabia, she managed a diversified team of researchers and substantially contributed to the university’s scientific development by actively shaping and defining the university’s research structure and strategies.
David Atienza AlonsoDavid Atienza Alonso is an associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures. Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.
Giovanni De MicheliExpertise
Design technologies for integrated systems on silicon, such as synthesis, hw/sw codesign and low-power design, as well as systems on heterogeneous platforms including electrical and biological components.
Scientific Director of EcoCloud Center at EPFL
Directing activities towards creating sustainable computation including AI.Designing energy-savvy data centers and edge devices.
More information
Please read http://si2.epfl.ch/~demichel/
Giovanni De Micheli is a research scientist in electronics and Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
Olivier SauterTeaching & PhD PhD Students Cassandre Ekta Contré, Antonia Frank, Peizheng Zhang, Jean-Pierre Thomas Svantner, Cristina Venturini, Cosmas Quirin Lorenz Heiss, Daniel Perales Rios, Viacheslav Bochkarev, Jan Jakub Frybes, Paul Véronique Guillaume Devianne Past EPFL PhD Students Clemente Angioni, Petri Nikkola, Alberto Bottino, Andrei Martynov, Emiliano Fable, Costanza Zucca, Federico Felici, Dávid Wágner, Doohyun Kim, Anna Teplukhina, Mengdi Kong, Francesco Carpanese, Simon Van Mulders, Stefano Marchioni, F
Drazen DujicDrazen Dujic is an Associate Professor and Head of the Power Electronics Laboratory at EPFL. He received the Dipl.Ing. and MSc degrees from the University of Novi Sad, Serbia in 2002 and 2005, respectively, and the PhD degree from Liverpool John Moores University, UK in 2008. From 2003 to 2006, he was a Research Assistant with the Faculty of Technical Sciences at University of Novi Sad. From 2006 to 2009, he was a Research Associate with Liverpool John Moores University. After that he moved to industry and joined ABB Switzerland Ltd, where from 2009 to 2013, he was Scientist and then Principal Scientist with ABB Corporate Research Center in Baden-Dättwil, and from 2013 to 2014 he was R&D Platform Manager with ABB Medium Voltage Drives in Turgi. He joined EPFL in 2014 as Tenure Track Assistant Professor and was promoted to Associate Professor in 2021. His research interests include the areas of design and control of advanced high power electronic systems and high-performance drives, predominantly for the medium voltage applications related to electrical energy generation, conversion and storage. He has authored or coauthored more than 150 scientific publications and has filed 16 patents. In 2018 he received EPE Outstanding Service Award from European Power Electronics and Drives Association and in 2014 the Isao Takahashi Power Electronics Award for Outstanding Achievement in Power Electronics. He is Senior Member of IEEE, and serves as Associate Editor for IEEE Transactions on Power Electronics, IEEE Transactions on Industrial Electronics and IET Electric Power Applications. He is Chairman of the Swiss IEEE Power Electronics Society (PELS) Chapter and IEEE PELS R8 Chair.
