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Concept

Branch table

Related publications (7)

Micro BTB: A High Performance and Storage Efficient Last-Level Branch Target Buffer for Servers

Vishal Gupta

High-performance branch target buffers (BTBs) and the L1I cache are key to high-performance front-end. Modern branch predictors are highly accurate, but with an increase in code footprint in modern-day server workloads, BTB and L1I misses are still frequen ...

ASSOC COMPUTING MACHINERY2022

Semantics-preserving inlining for metaprogramming

Martin Odersky, Nicolas Alexander Stucki, Sébastien Jean Robert Doeraene, Angelos Bimpoudis

Inlining is used in many different ways in programming languages: some languages use it as a compiler-directive solely for optimization, some use it as a metaprogramming feature, and others lay their design in-between. This paper presents inlining through ...

2020

Traffic Locality as an Opportunity in the Data Center

Jonas Fietz

In large scale data centers, network infrastructure is becoming a major cost component; as a result, operators are trying to reduce expenses, and in particular lower the amount of hardware needed to achieve their performance goals (or to improve the perfor ...

EPFL2019

A hybrid framework for industrial data storage and exploitation

Dimitrios Kyritsis, Foivos Psarommatis Giannakopoulos, Ioannis Tourkogiorgis

In this paper a hybrid framework is illustrated, with a software and hardware integration strategy, for an industrial platform that exploits features from a Relational Database (RDB) and Triplestore using the blackboard architectural pattern, ensuring effi ...

Elsevier2019

Adding flexibility to multi-tenant networks

Georgios Ioannidis

Cloud computing has been experiencing sharp development over the last years, leading to an increased demand for application migration to the cloud. Cloud providers, in an effort to attract more customers and earn their confidence, offer to tenants the illu ...

EPFL2018

Large-scale neural networks implemented with non-volatile memory as the synaptic weight element: impact of conductance response

Yusuf Leblebici, Irem Boybat Kara, Severin Sidler, Alessandro Fumarola

We assess the impact of the conductance response of Non-Volatile Memory (NVM) devices employed as the synaptic weight element for on-chip acceleration of the training of large-scale artificial neural networks (ANN). We briefly review our previous work towa ...

Ieee2016

Reconfigurable Forward Homography Estimation System for Real-Time Applications

Yusuf Leblebici, Vladan Popovic

Image processing and computer vision algorithms extensively use projections, such as homography, as one of the processing steps. Systems for homography calculation usually observe homography as an inverse problem and provide an exact solution. However, the ...

2014