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Concept

Memory protection

Related publications (31)

Secure Interface Design Leveraging Hardware/Software Support

Atri Bhattacharyya

Computer systems rely heavily on abstraction to manage the exponential growth of complexity across hardware and software. Due to practical considerations of compatibility between components of these complex systems across generations, developers have favou ...

EPFL2024

Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads

David Atienza Alonso, Marina Zapater Sancho, Darong Huang, Luis Maria Costero Valero, Qunyou Liu

The increasing demand for computing power and the emergence of heterogeneous computing architectures have driven the exploration of innovative techniques to address current limitations in both the compute and memory subsystems. One such solution is the use ...

2024

Bridging Monte Carlo worlds: a new framework for accelerator simulations applied on shielding and machine protection studies

André Donadon Servelle

This thesis delves into the critical study of particle transport in matter, particularly emphasising its implications for machine protection at CERN's accelerator complex and facilities. To conduct studies of this nature, FLUKA and Geant4 stand out within ...

EPFL2024

Rebooting Virtual Memory with Midgard

Siddharth Gupta

Virtual Memory (VM) is a critical programming abstraction that is widely used in various modern computing platforms. With the rise of datacenter computing and birth of planet-scale online services, the semantic and capacity requirements from memory have ev ...

EPFL2023

SecureCells: A Secure Compartmentalized Architecture

Babak Falsafi, Mathias Josef Payer, Siddharth Gupta, Atri Bhattacharyya, Yuanlong Li, Florian Hofhammer, Andrés Sánchez Marín

Modern programs are monolithic, combining code of varied provenance without isolation, all the while running on network-connected devices. A vulnerability in any component may compromise code and data of all other components. Compartmentalization separates ...

2023

How to Achieve Large-Area Ultra-Fast Operation of MoS 2 Monolayer Flash Memories?

Aleksandra Radenovic, Andras Kis, Zhenyu Wang, Yanfei Zhao, Mukesh Kumar Tripathi, Guilherme Migliato Marega, Hyungoo Ji, Asmund Kjellegaard Ottesen

Memory devices have returned to the spotlight due to increasing interest in using in-memory computing architectures to make data-driven algorithms more energy-efficient. One of the main advantages of this architecture is the efficient performance of vector ...

2023

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

Guilherme Migliato Marega

Machine learning and data processing algorithms have been thriving in finding ways of processing and classifying information by exploiting the hidden trends of large datasets. Although these emerging computational methods have become successful in today's ...

EPFL2023

HPCache: memory-efficient OLAP through proportional caching revisited

Anastasia Ailamaki, Periklis Chrysogelos, Hamish Mcniece Hill Nicholson

Analytical engines rely on in-memory data caching to avoid storage accesses and provide timely responses by keeping the most frequently accessed data in memory. Purely frequency- and time-based caching decisions, however, are a proxy of the expected query ...

Springer2023

Engram cell connectivity as a mechanism for information encoding and memory function

Maurizio Ferdinando Pezzoli

Information derived from experiences is incorporated into the brain as changes to ensembles of cells, termed engram cells, which allow memory storage and recall. The mechanism by which those changes hold specific information is unclear. Here, we test the h ...

Cell Press2023

Hardware-Software co-design Methodologies for Edge AI Optimization

Flavio Ponzina

ML-based edge devices may face memory and computational errors that affect applications' reliability and performance. These errors can be the result of particular working conditions (e.g., radiation areas in physical experiments or avionics) or could be th ...

EPFL2023

Method for reading and writing unreliable memories and a corresponding memory controller device and memory

Andreas Peter Burg, Reza Ghanaatian Jahromi

A method of accessing a memory space of a memory device with a decoder, the memory space having faults, including the steps of performing a memory access operation by an electronic device to a access a logical memory space of the memory device, and randomi ...

2022

Midas: Systematic Kernel TOCTTOU Protection

Mathias Josef Payer, Atri Bhattacharyya, Uros Tesic

Double-fetch bugs are a plague across all major operating system kernels. They occur when data is fetched twice across the user/kernel trust boundary while allowing concurrent modification. Such bugs enable an attacker to illegally access memory, cause den ...

2022

Tuning paradigm of external stimuli driven electronic, optical and magnetic properties in hybrid perovskites and metalorganic complexes br

Mohammad Khaja Nazeeruddin

We have witnessed a wide range of theoretical as well as experimental investigations to envisage external stimuli induced changes in electronic, optical and magnetic properties in the metal organiccomplexes, while hybrid perovskites have recently joined th ...

ELSEVIER SCI LTD2022

HPCache: Memory-Efficient OLAP Through Proportional Caching

Anastasia Ailamaki, Hamish Mcniece Hill Nicholson, Periklis Chrysogelos

Analytical engines rely on in-memory caching to avoid disk accesses and provide timely responses by keeping the most frequently accessed data in memory. Purely frequency- & time-based caching decisions, however, are a proxy of the expected query execution ...

ACM2022

An Accuracy-Driven Compression Methodology to Derive Efficient Codebook-Based CNNs

David Atienza Alonso, Giovanni Ansaloni, Miguel Peon Quiros, Flavio Ponzina

Codebook-based optimizations are a class of algorithmic-level transformations able to effectively reduce the computing and memory requirements of Convolutional Neural Networks (CNNs). This approach tightly limits the number of unique weights in each layer, ...

2022

Decentralized in-order execution of a sequential task-based code for shared-memory architectures

Charly Nicolas Lucien Castes

The hardware complexity of modern machines makes the design of adequate programming models crucial for jointly ensuring performance, portability, and productivity in high-performance computing (HPC). Sequential task-based programming models paired with adv ...

IEEE COMPUTER SOC2022

Modulation of working memory duration by synaptic and astrocytic mechanisms

Sophia Becker

Short-term synaptic plasticity and modulations of the presynaptic vesicle release rate are key components of many working memory models. At the same time, an increasing number of studies suggests a potential role of astrocytes in modulating higher cognitiv ...

PUBLIC LIBRARY SCIENCE2022

AstriFlash: A Flash-Based System for Online Services

Babak Falsafi, Siddharth Gupta, Mark Johnathon Sutherland, Yunho Oh, Lei Yan, Lei Yan

Modern datacenters host datasets in DRAM to offer large-scale online services with tight tail-latency requirements. Unfortunately, as DRAM is expensive and increasingly difficult to scale, datacenter operators are forced to consider denser storage technolo ...

2023

Rethinking Software Runtimes for Disaggregated Memory

Sanidhya Kashyap

Disaggregated memory can address resource provisioning inefficiencies in current datacenters. Multiple software runtimes for disaggregated memory have been proposed in an attempt to make disaggregated memory practical. These systems rely on the virtual mem ...

ASSOC COMPUTING MACHINERY2021

Networks of Coupled VO2 Oscillators for Neuromorphic Computing

Elisabetta Corti

Neuromorphic computing is a wide research field aimed to the realization of brain-inspired hardware, apt to tackle computation of unstructured data more efficiently than currently done with standard computational units. Oscillatory neural networks are know ...

EPFL2021