Northbridge (computing)

Overflow-free compute memories for edge AI acceleration

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Flavio Ponzina, Marco Antonio Rios

Compute memories are memory arrays augmented with dedicated logic to support arithmetic. They support the efficient execution of data-centric computing patterns, such as those characterizing Artificial Intelligence (AI) algorithms. These architectures can ...

2023

Dynamic SIMD Parallel Execution on GPU from High-Level Dataflow Synthesis

Marco Mattavelli, Simone Casale Brunet, Aurélien François Gilbert Bloch

Developing and fine-tuning software programs for heterogeneous hardware such as CPU/GPU processing platforms comprise a highly complex endeavor that demands considerable time and effort of software engineers and requires evaluating various fundamental comp ...

MDPI2022

Development of a large-area, light-weight module using the MALTA monolithic pixel detector

Edoardo Charbon, Francesco Piro

The MALTA pixel chip is a 2 cm x 2 cm large monolithic pixel detector developed in the Tower 180 nm imaging process. The chip contains four CMOS transceiver blocks at its sides which allow chip-to-chip data transfer. The power pads are located mainly at th ...

ELSEVIER2022

GPU Acceleration for Simulating Massively Parallel Many-Core Platforms

David Atienza Alonso, Luca Benini, Martino Ruggiero, Shivani Raghav

Emerging massively parallel architectures such as a general-purpose processor plus many-core programmable accelerators are creating an increasing demand for novel methods to perform their architectural simulation. Most state-of-the-art simulation technolog ...

Institute of Electrical and Electronics Engineers2015

Insights into the thermo-mechanics of orthogonal nanometric machining

Jean-François Molinari, Guillaume Anciaux, Pedro Romero

The fabrication of high precision miniaturized components in micro- and nano-technologies requires a deep understanding of the physical mechanisms governing the nanomachining process. To aid with this need, the current article employs molecular dynamics to ...

Elsevier2013

Full System Simulation of Many-Core Heterogeneous SoCs using GPU and QEMU Semihosting

David Atienza Alonso, Luca Benini, Martino Ruggiero, Shivani Raghav

Modern system-on-chips are evolving towards complex and heterogeneous platforms with general-purpose processors coupled with massively parallel manycore accelerator fabrics (e.g. embedded GPUs). Platform developers are looking for efficient full-system sim ...

2012

OLTP on Hardware Islands

Anastasia Ailamaki, Ippokratis Pandis, Danica Porobic, Pinar Tözün, Miguel Sérgio De Oliveira Branco

Modern hardware is abundantly parallel and increasingly heterogeneous. The numerous processing cores have non-uniform access latencies to the main memory and to the processor caches, which causes variability in the communication costs. Unfortunately, datab ...

2012

GPGPU-Accelerated Parallel and Fast Simulation of Thousand-core Platforms

David Atienza Alonso, Luca Benini, Martino Ruggiero, Shivani Raghav

The multicore revolution and the ever-increasing complexity of computing systems is dramatically changing system design, analysis and programming of computing platforms. Future architectures will feature hundreds to thousands of simple processors and on-ch ...

IEEE/ACM Press2011

Reactive NUCA: Near-Optimal Block Placement and Replication in Distributed Caches

Anastasia Ailamaki, Babak Falsafi, Michael Ferdman

Increases in on-chip communication delay and the large working sets of server and scientific workloads complicate the design of the on-chip last- level cache for multicore processors. The large working sets favor a shared cache design that maximizes the ag ...

2009

Northbridge (computing)

Overflow-free compute memories for edge AI acceleration

Dynamic SIMD Parallel Execution on GPU from High-Level Dataflow Synthesis

Development of a large-area, light-weight module using the MALTA monolithic pixel detector

GPU Acceleration for Simulating Massively Parallel Many-Core Platforms

Insights into the thermo-mechanics of orthogonal nanometric machining

Full System Simulation of Many-Core Heterogeneous SoCs using GPU and QEMU Semihosting

OLTP on Hardware Islands

GPGPU-Accelerated Parallel and Fast Simulation of Thousand-core Platforms

Reactive NUCA: Near-Optimal Block Placement and Replication in Distributed Caches

Contribution to the development of the acquisition electronics for the LHCb experiment

Graph Chatbot

Overflow-free compute memories for edge AI acceleration

Dynamic SIMD Parallel Execution on GPU from High-Level Dataflow Synthesis

Development of a large-area, light-weight module using the MALTA monolithic pixel detector

GPU Acceleration for Simulating Massively Parallel Many-Core Platforms

Insights into the thermo-mechanics of orthogonal nanometric machining

Full System Simulation of Many-Core Heterogeneous SoCs using GPU and QEMU Semihosting

OLTP on Hardware Islands

GPGPU-Accelerated Parallel and Fast Simulation of Thousand-core Platforms

Reactive NUCA: Near-Optimal Block Placement and Replication in Distributed Caches

Contribution to the development of the acquisition electronics for the LHCb experiment