Edoardo CharbonEdoardo Charbon (SM’00 F’17) received the Elektrotechnik Diploma from ETH Zurich, the M.S. from the University of California at San Diego, and the Ph.D. from the University of California at Berkeley in 1988, 1991, and 1995, respectively, all in electrical engineering and EECS. He has consulted with numerous organizations, including Bosch, X-Fab, Texas Instruments, Maxim, Sony, Agilent, and the Carlyle Group. He was with Cadence Design Systems from 1995 to 2000, where he was the architect of the company's initiative on information hiding for intellectual property protection. In 2000, he joined Canesta Inc., as the Chief Architect, where he led the development of wireless 3-D CMOS image sensors. Since 2002 he has been a member of the faculty of EPFL, where is a full professor since 2015. From 2008 to 2016 he was full professor and chair at the Delft University of Technology, where he spearheaded the university's effort on cryogenic electronics for quantum computing as part of QuTech. He has been the driving force behind the creation of deep-submicron CMOS SPAD technology, which is mass-produced since 2015 and is present in smartphones, telemeters, proximity sensors, and medical diagnostics tools. His interests span from 3-D vision, LiDAR, FLIM, FCS, NIROT to super-resolution microscopy, time-resolved Raman spectroscopy, and cryo-CMOS circuits and systems for quantum computing. He has authored or co-authored over 400 papers and two books, and he holds 23 patents. Dr. Charbon is a distinguished visiting scholar of the W. M. Keck Institute for Space at Caltech, a fellow of the Kavli Institute of Nanoscience Delft, a distinguished lecturer of the IEEE Photonics Society, and a fellow of the IEEE.
Jürgen BruggerI am a Professor of Microengineering and co-affiliated to Materials Science. Before joining EPFL I was at the MESA Research Institute of Nanotechnology at the University of Twente in the Netherlands, at the IBM Zurich Research Laboratory, and at the Hitachi Central Research Laboratory, in Tokyo, Japan. I received a Master in Physical-Electronics and a PhD degree from Neuchâtel University, Switzerland. Research in my laboratory focuses on various aspects of MEMS and Nanotechnology. My group contributes to the field at the fundamental level as well as in technological development, as demonstrated by the start-ups that spun off from the lab. In our research, key competences are in micro/nanofabrication, additive micro-manufacturing, new materials for MEMS, increasingly for wearable and biomedical applications. Together with my students and colleagues we published over 200 peer-refereed papers and I had the pleasure to supervise over 25 PhD students. Former students and postdocs have been successful in receiving awards and starting their own scientific careers. I am honoured for the appointment in 2016 as Fellow of the IEEE “For contributions to micro and nano manufacturing technology”. In 2017 my lab was awarded an ERC AdvG in the field of advanced micro-manufacturing.
David Atienza AlonsoDavid Atienza Alonso is an associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures. Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
Maher KayalMaher Kayal received M.S. and Ph.D degrees in electrical engineering from the Ecole Polytechnique Fédérale de Lausanne (EPFL, Switzerland) in 1983 and 1989 respectively. He has been with the Electronics laboratories of the Ecole Polytechnique Fédérale de Lausanne (EPFL, Switzerland) since 1990, where he is currently a professor and director of the Energy Management and Sustainability" section. He has published many scientific papers, coauthor of three text books dedicated to mixed-mode CMOS design and he holds eleven patents. His technical contributions have been in the area of analog and Mixed-signal circuits design including highly linear and tunable sensors microsystems, signal processing and green energy management.
Prizes and Honors
Electronics Letters journal Premium Award 2013,
Outstanding Paper Award? IEEE Mixdes 2013
Basil Papadias paper Award, IEEE Powertech 2013
Best Paper Awards, Mixdes 2013
Best Paper Awards, ICCAS 2012
Outstanding Paper Award- IEEE Mixdes 2012.
Poland Section IEEE ED Chapter special award in 2011.
Credit Suisse Award for Best Teaching- 2009.
The William M. Portnoy Award at the Energy Conversion Congress and Exposition , California Sept 2009.
Best Paper Award - IEEE-Mixdes 2009.
High Quality Paper - IEEE Power Tech Conference June 2009.
Best Paper Award - IEEE-Mixdes 2007.
Best Paper Award - IEEE-TTTC International Conference on Automation, Quality and Testing, Robotics - 2006.
Best Application Specific Integrated Circuit at the International European Design and Test Conference ED&TC - 1997.
Ascom Award for the Best Work in Telecommunication Fields 1990.
Publications Books.
Books:
Methodology for the Digital Calibration of Analog Circuits and Systems, Marc Pastre & Maher Kayal. Springer Publisher- (ISBN 1-4020-4252-3)-2006.
Structured Analog CMOS Design, Danica Stefanovic & Maher Kayal. Springer Publisher-(ISBN 978-1-4020-8572-7)-2008.
Linear CMOS RF Amplifiers for Wireless Applications, Maher Kayal, Springer Publisher. (ISBN 978-90-481-9360-8)-2010.
Coeditor of Microelectronics Education Kluwer Academic Publishers. (ISBN 1-4020-2072-4). -2004.
Giovanni De MicheliExpertise
Design technologies for integrated systems on silicon, such as synthesis, hw/sw codesign and low-power design, as well as systems on heterogeneous platforms including electrical and biological components.
Scientific Director of EcoCloud Center at EPFL
Directing activities towards creating sustainable computation including AI.Designing energy-savvy data centers and edge devices.
More information
Please read http://si2.epfl.ch/~demichel/
Giovanni De Micheli is a research scientist in electronics and Mihai Adrian IonescuAdrian M. Ionescu is Full Professor at the Swiss Federal Institute of Technology, Lausanne, Switzerland. He received the B.S./M.S. and Ph.D. degrees from the Polytechnic Institute of Bucharest, Romania and the National Polytechnic Institute of Grenoble, France, in 1989 and 1997, respectively. He has held staff and/or visiting positions at LETI-CEA, Grenoble, France and INP Grenoble, France and Stanford University, USA, in 1998 and 1999. Dr. Ionescu has published more than 600 articles in international journals and conferences. He received many Best Paper Awards in international conferences, the Annual Award of the Technical Section of the Romanian Academy of Sciences in 1994 and the Blondel Medal in 2009 for contributions to the progress in engineering sciences in the domain of electronics. He is the 2013 recipient of the IBM Faculty Award in Engineering. He served the IEDM and VLSI conference technical committees and was the Technical Program Committee (Co)Chair of ESSDERC in 2006 and 2013. He is a member of the SATW. He is director of the Laboratory of Micro/Nanoelectronic Devices (NANOLAB).
Aleksandra RadenovicFrom April 2021 Full Professor 2015 -2021 Associate Professor2008-2015 Tenure-Track Assistant Professor2004-2007 Postdoc at the University of California, Berkeley in the group of Prof.Liphardt2003 PhD student of Prof. Dietler in Laboratory of Physics of Living Matter, University of Lausanne 1999 Diploma thesis on the subject of the Raman spectroscopy of beta carotene1994-1999 Physics department at the University of Zagreb1994 baccalaureate, Classical gymnasium
Junrui ChenJunrui Chen achieved his BSc. degree in Mechanism and its automation from Beihang University (BUAA), Beijing, China in 2017. Meanwhile, he also received a second degree in Business administration and management. He completed his MSc in Mechatronics and Information Technology at Karlsruhe Institute of Technology (KIT), Germany, in 2021. During his master's studies, he participated in a project at the Institute of Biomedical Engineering (BIT) to optimize an interface for ECG/PLT signal detection using MATLAB
Cédric MeinenTeaching & PhD Courses Electrical systems and electronics I EE-295 The course has the aim to provide the fundamental knowledge and experiences to understand basic electrical systems. Electrical systems and electronics II EE-296 The basic concepts enabling to understand and analysis the electronic systems dedicated to signals acquisition and processing (e.g. biosensors, physiological signals, ECG) are addressed. This includes the acquisition, amplification and filtering. El
Pierre-André FarinePierre-André Farine received the Doctoral and Engineering Degrees in Microtechnology from University of Neuchâtel, Switzerland, respectively in 1984 and 1978, and the Engineering in Microtechnology from ETS Le Locle in 1974.
He was working 17 years for the Swiss watch industries (Swatch Group), including developments for high-tech products, such as pager watches, watches including integrated sensors such as pressure, compass, altimeter and temperature sensors for Tissot. He was also involved in prototypes developments for watches including GPS and cellular GSM phones.
Since 8 years, he is Professor in Electronics and Signal Processing at the Institute of Microtechnology IMT, University of Neuchâtel, Switzerland. Full professor at EPFL since January 1st, 2009, he works in the field of low-power integrated products for portable devices, including microelectronics for wireless telecommunications, UWB and GNSS systems. He is Head of the Electronics and Signal Processing Laboratory ESPLAB of the EPFL IMT-NE. His laboratory works also for video and audio compression algorithms and their implementation in low power integrated circuits.
Mohammad Khaja NazeeruddinDr. Md. K. Nazeeruddin received M.Sc. and Ph. D. in inorganic chemistry from Osmania University, Hyderabad, India. He joined as a Lecturer in Deccan College of Engineering and Technology, Osmania University in 1986, and subsequently, moved to Central Salt and Marine Chemicals Research Institute, Bhavnagar, as a Research Associate. He was awarded the Government of Indias fellowship in 1987 for study abroad. In 2014, EPFL awarded him the title of Professor. His current research at EPFL focuses on Dye Sensitized Solar Cells, Perovskite Solar Cells, CO2 reduction, Hydrogen production, and Light-emitting diodes. He has published more than 509 peer-reviewed papers, ten book chapters, and he is inventor/co-inventor of over 50 patents. The high impact of his work has been recognized by invitations to speak at over 130 international conferences, and has been nominated to the OLLA International Scientific Advisory Board. He appeared in the ISI listing of most cited chemists, and has more than 49'000 citations with an h-index of 105. He is teaching "Functional Materials" course at EPFL, and Korea University; directing, and managing several industrial, national, and European Union projects. He was awarded EPFL Excellence prize in 1998 and 2006, Brazilian FAPESP Fellowship in 1999, Japanese Government Science & Technology Agency Fellowship, in 1998, Government of India National Fellowship in 1987-1988. Recently he has been appointed as World Class University (WCU) professor by the Korea University, Jochiwon, Korea (http://dses.korea.ac.kr/eng/sub01_06_2.htm), Adjunct Professor by the King Abdulaziz University, Jeddah, Saudi Arabia and Eminent Professor in Brunei. Thomas La GrangeExpertise
Electron Microscopy, Aberration Correct Scanning Transmission Electron Microscopy, Electron Diffraction, Ultrafast Transmission Electron Microscopy, Electron Energy Loss Spectroscopy, Energy Dispersive Spectroscopy, Materials Science, High-speed deformation, Dislocation Dynamics, Skyrmionics, Martensitic Phase Transformation Theory, Solidification
Expertise
Electron Microscopy, Aberration Correct Scanning Transmission Electron Microscopy, Electron Diffraction, Ultrafast Transmission Electron Micro
Edouard BugnionEdouard Bugnion joined EPFL in 2012, where his focus is on datacenter systems. His areas of interest include operating systems, datacenter infrastructure (systems and networking), and computer architecture. Before joining EPFL, Edouard spent 18 years in the US, where he studied at Stanford and co-founded two startups: VMware and Nuova Systems (acquired by Cisco). At VMware from 1998 until 2005, he played many roles including CTO. At Nuova/Cisco from 2005 until 2011, he helped build the core engineering team and became the VP/CTO of Ciscos Server, Access, and Virtualization Technology Group, a group that brought to market Ciscos Unified Computing System (UCS) platform for virtualized datacenters. Prof. Bugnion is a Fellow of the ACM. Together with his colleagues, he received the ACM Software System Award for VMware 1.0 in 2009. His paper Disco: Running Commodity Operating Systems on Scalable Multiprocessors" received a Best Paper Award at SOSP '97 and was entered into the ACM SIGOPS Hall of Fame Award in 2008. At EPFL, he received the OSDI 2014 Best Paper Award for his work on the IX dataplane operating system
Babak FalsafiBabak is a Professor in the School of Computer and Communication Sciences and the founding director of the EcoCloud, an industrial/academic consortium at EPFL investigating scalable data-centric technologies. He has made numerous contributions to computer system design and evaluation including a scalable multiprocessor architecture which was prototyped by Sun Microsystems (now Oracle), snoop filters and memory streaming technologies that are incorporated into IBM BlueGene/P and Q and ARM cores, and computer system performance evaluation methodologies that have been in use by AMD, HP and Google PerKit . He has shown that hardware memory consistency models are neither necessary (in the 90's) nor sufficient (a decade later) to achieve high performance in multiprocessor systems. These results eventually led to fence speculation in modern microprocessors. His latest work on workload-optimized server processors laid the foundation for the first generation of Cavium ARM server CPUs, ThunderX. He is a recipient of an NSF CAREER award, IBM Faculty Partnership Awards, and an Alfred P. Sloan Research Fellowship. He is a fellow of IEEE and ACM.
