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Concept

Shift register

Related publications (13)

Swap and Rotate: Lightweight Linear Layers for SPN-based Blockciphers

Serge Vaudenay, Francesco Regazzoni, Subhadeep Banik, Muhammed Fatih Balli

In CHES 2017, Jean et al. presented a paper on "Bit-Sliding" in which the authors proposed lightweight constructions for SPN based block ciphers like AES, PRESENT and SKINNY. The main idea behind these constructions was to reduce the length of the datapath ...

2020

End-to-End Industrial Study of Retiming

Giovanni De Micheli, Cunxi Yu

Sequential circuits are combinational circuits that are separated by registers. Retiming is considered as the most promising technique for optimizing sequential circuits, that involves moving the edge-triggered registers across the combinational logic with ...

IEEE2018

Cmos compatible non-volatile latch and d-flip flop using resistive switching materials

Davide Sacchetto, Yusuf Leblebici, Tugba Demirci

A non-volatile latch circuitry, comprising a Re RAM cell configured to store a final value of the non-volatile latch circuitry; a data selection circuitry configured to connect or disconnect a data input to a plus voltage node and a minus voltage node of t ...

2014

On Zero-Dimensional Exciton-Polaritons

Roland Cerna

Microcavity exciton-polaritons are half-matter half-light quasiparticles with outstanding properties. This offers a great way to access and control fundamental excitations in a solid by simple optical means. Therefore, apart from their importance in fundam ...

EPFL2011

Methodology for the Digital Calibration of Analog Circuits and Systems Using Sub-binary Radix DACs

Maher Kayal, Marc Pastre

This paper presents a methodology for digitally calibrating analog circuits and systems. Based on the detection of an imperfection by a simple comparator, a successive approximations algorithm tunes a compensation current. The latter is generated by a sub- ...

2010

System for generating computer processor

A method and apparatus to produce a net list of gates and Flip-Flops for one algorithm in order to find the best compromise between power consumption, speed and silicon surface by using a two step process. First the algorithm is written for a processor tha ...

2010

Methodology for the Digital Calibration of Analog Circuits and Systems Using Sub-binary Radix DACs

Maher Kayal, Marc Pastre

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009

CMOS Compressed Imaging by Random Convolution

Yusuf Leblebici, Pierre Vandergheynst, Alexandre Schmid, Laurent Jacques, Vahid Majidzadeh Bafar

We present a CMOS imager with built-in capability to perform Compressed Sensing. The adopted sensing strategy is the random Convolution due to J. Romberg. It is achieved by a shift register set in a pseudo-random configuration. It acts as a convolutive fil ...

2009

Sharing is Harder than Agreeing

Rachid Guerraoui

One of the most celebrated results of the theory of distributed computing is the impossibility, in an asynchronous system of

n

processes that communicate through shared memory registers, to solve the set agreement problem where the processes need to deci ...

2008

A scalable and oblivious atomicity assertion

Rachid Guerraoui

This paper presents SOAR: the first oblivious atomicity assertion with polynomial complexity. SOAR enables to check atomicity of a single-writer multi-reader register implementation. The basic idea underlying the low overhead induced by SOAR lies in greedi ...

Springer-Verlag New York, Ms Ingrid Cunningham, 175 Fifth Ave, New York, Ny 10010 Usa2008

Amnesic Distributed Storage

Rachid Guerraoui

Distributed storage algorithms implement the abstraction of a shared register over distributed base objects. We study a specific class of storage algorithms, which we call amnesic: these have the pragmatic property that old values written in the implemente ...

2007

Design of Completion Detection Circuits for Self-timed Systems Operating in Subthreshold Regime

Yusuf Leblebici, Eric Vittoz, Omer Can Akgun

In this paper implementation of a novel completion detection method for self-timed, asynchronous subthreshold circuits is presented. By employing the self-timed operation principle, substantial speed gains in the operation of the asynchronous pipelines can ...

2007

Current Sensing Completion Detection for Subthreshold Asynchronous Circuits

Yusuf Leblebici, Eric Vittoz, Omer Can Akgun

In this paper a novel completion detection method for self-timed, asynchronous subthreshold circuits is presented. By employing the self-timed operation principle, substantial speed gains in the operation of the asynchronous pipelines can be realized. The ...

2007

Related publications (13)

n

processes that communicate through shared memory registers, to solve the set agreement problem where the processes need to deci ...

2008