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Concept

Ray-tracing hardware

Related publications (19)

SAT-based Exact Modulo Scheduling Mapping for Resource-Constrained CGRAs

David Atienza Alonso, Giovanni Ansaloni, José Angel Miranda Calero, Benoît Walter Denkinger, Juan Pablo Sapriza Araujo, Ruben Rodriguez, Rubén Rodríguez Álvarez

Coarse-Grain Reconfigurable Arrays (CGRAs) represent emerging low-power architectures designed to accelerate Compute-Intensive Loops (CILs). The effectiveness of CGRAs in providing acceleration relies on the quality of mapping: how efficiently the CIL is c ...

2024

Real-Time Localization for Closed-Loop Control of Assistive Furniture

Auke Ijspeert, Alexandre Massoud Alahi, George Adaimi, Anastasia Bolotnikova, Lixuan Tang, Chuanfang Ning

For people with limited mobility, navigating in cluttered indoor environment is challenging. In this work, we propose a mobile assistive furniture suite that is designed to ease the life of people with special needs in indoor movement. To enable intelligen ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023

BigNeuron: a resource to benchmark and predict performance of algorithms for automated tracing of neurons in light microscopy datasets

Pascal Fua, Sean Lewis Hill, Jiancheng Yang, Amos Sironi, Jian Yang

BigNeuron is an open community bench-testing platform with the goal of setting open standards for accurate and fast automatic neuron tracing. We gathered a diverse set of image volumes across several species that is representative of the data obtained in m ...

Nature Publishing Group2023

Artificial Intelligence for road quality assessment in smart cities: a machine learning approach to acoustic data analysis

Simon Elias Bibri

In smart cities, ensuring road safety and optimizing transportation efficiency heavily relies on streamlined road condition monitoring. The application of Artificial Intelligence (AI) has notably enhanced the capability to detect road surfaces effectively. ...

Springernature2023

Efficient Analytical Query Processing on CPU-GPU Hardware Platforms

Periklis Chrysogelos

Timely insights lead to business growth and scientific breakthroughs but require analytical engines that cope with the ever-increasing data processing needs. Analytical engines relied on rapid CPU improvements, yet the end of Dennard scaling stopped the fr ...

EPFL2022

Modified Joint Channel-and-Data Estimation for One-Bit Massive MIMO

Saeed Saadatnejad, Mohammadhossein Bahari, Mahdi Amiri

Centralized and cloud computing-based network architectures are the promising tracks of future communication systems where a large scale compute power can be virtualized for various algorithms. These architectures rely on high-performance communication lin ...

IEEE2021

A Dynamically Reconfigurable Platform for High-Performance and Low-Power On-Board Processing

Paolo Ienne, Andrea Guerrieri, Sahand Kashani

FPGAs (Field Programmable Gate Array) are an attractive technology for high-speed data processing in space missions due to their unbeatable flexibility and best performance-to-power ratio in comparison to software. However FPGAs suffer from 3 major drawbac ...

IEEE2018

Hardware/Software Co-Design of Ultra-Low Power Biomedical Monitors

Ruben Braojos Lopez

Ongoing changes in world demographics and the prevalence of unhealthy lifestyles are imposing a paradigm shift in healthcare delivery. Nowadays, chronic ailments such as cardiovascular diseases, hypertension and diabetes, represent the most common causes o ...

EPFL2016

Generating Configurable Hardware from Parallel Patterns

Christos Kozyrakis

In recent years the computing landscape has seen an increasing shift towards specialized accelerators. Field programmable gate arrays (FPGAs) are particularly promising for the implementation of these accelerators, as they offer significant performance and ...

Assoc Computing Machinery2016

Accelerators for Data Processing

Yusuf Onur Koçberber

The explosive growth in digital data and its growing role in real-time analytics motivate the design of high-performance database management systems (DBMSs). Meanwhile, slowdown in supply voltage scaling has stymied improvements in core performance and ush ...

EPFL2015

Buffer overlow vulnerabilities in CUDA: a preliminary analysis

Andrea Miele

We present a preliminary study of buffer overflow vulnerabilities in CUDA software running on GPUs. We show how an attacker can overrun a buffer to corrupt sensitive data or steer the execution flow by overwriting function pointers, e.g., manipulating the ...

Springer France2015

Real-Time High-Resolution Multiple-Camera Depth Map Estimation Hardware and Its Applications

Abdulkadir Akin

Depth information is used in a variety of 3D based signal processing applications such as autonomous navigation of robots and driving systems, object detection and tracking, computer games, 3D television, and free view-point synthesis. These applications r ...

EPFL2015

Inferring Scalability from Program Pseudocode

Mihai Letia

Recent trends have led hardware manufacturers to place multiple processing cores on a single chip, making parallel programming the intended way of taking advantage of the increased processing power. However, bringing concurrency to average programmers is c ...

EPFL2014

Scalable Simulation Methodologies for Many-Core Heterogeneous Systems

Shivani Raghav

With increasing complexity and performance demands of emerging compute-intensive data-parallel workloads, many-core computing systems are becoming a popular trend in computer design. Fast and scalable simulation methods are needed to make meaningful predic ...

EPFL2014

Selective Flexibility: Creating Domain-Specific Reconfigurable Arrays

Paolo Ienne, Philip Brisk, Mirjana Stojilovic, David Novo Bruna

Historically, hardware acceleration technologies have either been application-specific, therefore lacking in flexibility, or fully programmable, thereby suffering from notable inefficiencies on an application-by-application basis. To address the growing ne ...

Institute of Electrical and Electronics Engineers2013

Design Methods for Parallel Hardware Implementation of Multimedia Iterative Algorithms

David Atienza Alonso, Ivan Beretta, Alessandro Antonio Nacci

Traditionally, parallel implementations of multimedia algorithms are carried out manually, since the automation of this task is very difficult due to the complex dependencies that generally exist between different elements of the data set. Moreover, there ...

Institute of Electrical and Electronics Engineers2013

FFT processor for OFDM channel estimation

Andreas Peter Burg

Pilot-assisted channel estimation for communication systems employing orthogonal frequency division multiplexing modulation requires significant signal processing at the receiver if the correlation among the frequency-domain channel coefficients is to be e ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2007

Robot-Animal Interaction: Perception and Behavior of Insbot

Roland Siegwart, Gilles Caprari, Masoud Asadpour, Fabien Tâche

This paper describes hardware and behavior implementation of a miniature robot in size of a match box that simulates the behavior of cockroaches in order to establish a social interaction with them. The robot is equipped with two micro-processors dedicated ...

2006

Robot-animal interaction: Perception and behavior of insbot

Roland Siegwart, Gilles Caprari, Masoud Asadpour, Fabien Tâche

This paper describes the hardware and behavior implementation of a miniature robot in size of a match box that simulates the behavior of cockroaches in order to establish a social interaction with them. The robot is equipped with two micro-processors dedic ...

2005