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Concept

Microcode

Related publications (29)

Latency Interfaces for Systems Code

Rishabh Ramesh Iyer

This thesis demonstrates that it is feasible for systems code to expose a latency interface that describes its latency and related side effects for all inputs, just like the code's semantic interface describes its functionality and related side effects. S ...

EPFL2023

Do Children Adapt Their Perspective to a Robot When They Fail to Complete a Task?

Pierre Dillenbourg, Elmira Yadollahi

Spatial understanding and communication are essential skills in human interaction. An adequate understanding of others' spatial perspectives can increase the quality of the interaction, both perceptually and cognitively. In this paper, we take the first st ...

Assoc Computing Machinery2022

Micro-architectural analysis of in-memory OLTP: Revisited

Anastasia Ailamaki, Danica Porobic, Utku Sirin

Micro-architectural behavior of traditional disk-based online transaction processing (OLTP) systems has been investigated extensively over the past couple of decades. Results show that traditional OLTP systems mostly under-utilize the available micro-archi ...

2021

Micro-architectural Analysis of Database Workloads

Utku Sirin

Database workloads have significantly evolved in the past twenty years. Traditional database systems that are mainly used to serve Online Transactional Processing (OLTP) workloads evolved into specialized database systems that are optimized for particular ...

EPFL2021

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

Giovanni De Micheli, Mathias Soeken, Eleonora Testa

Emerging technologies such as plasmonics and photonics are promising alternatives to CMOS for high throughput applications, thanks to their waveguide's low power consumption and high speed of computation. Besides these qualities, these novel technologies a ...

2020

Sweat monitoring with CMOS compatible technology: ISFETS and beyond

Francesco Bellando

In recent years, sweat has gained increasing attention from the scientific community as a new analyte for health monitoring. The main advantage with respect to the "Gold Standard" for laboratory analysis, i.e. blood, is of course the possibility of perform ...

EPFL2020

Design of approximate and precision-scalable circuits for embedded multimedia and neural-network processing

Vincent Frédéric Camus

Density, speed and energy efficiency of integrated circuits have been increasing exponentially for the last four decades following Moore's law. However, power and reliability pose several challenges to the future of technology scaling. Approximate computin ...

EPFL2019

Fully-Asynchronous Cache-Efficient Simulation of Detailed Neural Networks

Felix Schürmann

Modern asynchronous runtime systems allow the re-thinking of large-scale scientific applications. With the example of a simulator of morphologically detailed neural networks, we show how detaching from the commonly used bulk-synchronous parallel (BSP) exec ...

SPRINGER INTERNATIONAL PUBLISHING AG2019

ReRAM From Material Study to CMOS Co-integration

Elmira Shahrabi

The revolution of information-technology owes to silicon-based complementary-metal-oxide (CMOS) technology. However, CMOS technology approaches its physical limitation hardening the further progress of memory devices as well as computing paradigm requiring ...

EPFL2019

Computer Algebraic Approach to Verification and Debugging of Galois Field Multipliers

Cunxi Yu

The paper presents a novel method to verify and debug gate-level arithmetic circuits implemented in Galois Field arithmetic. The method is based on forward reduction of the specification polynomials of the circuit in GF(2(m)) using GF(2) models of its logi ...

IEEE2018

Compact laser-assisted tools for high-resolution additive manufacturing

Paul Delrot

Micro-additive manufacturing has become an enabling technology in biomedical research as it allows for instance creating functional microstructures or studying cellular interactions at the microscale. Among the various manufacturing techniques laser-actuat ...

EPFL2018

Reducing circuit design complexity for neuromorphic machine learning systems based on Non-Volatile Memory arrays

Yusuf Leblebici, Alessandro Fumarola

Machine Learning (ML) is an attractive application of Non-Volatile Memory (NVM) arrays [1,2]. However, achieving speedup over GPUs will require minimal neuron circuit sharing and thus highly area-efficient peripheral circuitry, so that ML reads and writes ...

2017

HEAL-WEAR: an Ultra-Low Power Heterogeneous System for Bio-Signal Analysis

David Atienza Alonso, Giovanni Ansaloni, Ruben Braojos Lopez, Soumya Subhra Basu, Loris Gérard Duch

Personalized healthcare devices enable low-cost, unobtrusive and long-term acquisition of clinically-relevant biosignals. These appliances, termed Wireless Body Sensor Nodes (WBSNs), are fostering a revolution in health monitoring for patients affected by ...

Ieee-Inst Electrical Electronics Engineers Inc2017

Microarchitectural Low-Power Design Techniques for Embedded Microprocessors

Jeremy Hugues-Felix Constantin

With the omnipresence of embedded processing in all forms of electronics today, there is a strong trend towards wireless, battery-powered, portable embedded systems which have to operate under stringent energy constraints. Consequently, low power consumpti ...

EPFL2016

Parallel Inverse Kinematics for Multithreaded Architectures

Ronan Boulic, Benoît Le Callennec, Mentar Mahmudi, Pawan Kumar Harish

In this article, we present a parallel prioritized Jacobian-based inverse kinematics algorithm for multithreaded architectures. We solve damped least squares inverse kinematics using a parallel line search by identifying and sampling critical input paramet ...

Association for Computing Machinery2016

Automatic Generation of Efficient Accelerators for Reconfigurable Hardware

Christos Kozyrakis

Acceleration in the form of customized datapaths offer large performance and energy improvements over general purpose processors. Reconfigurable fabrics such as FPGAs are gaining popularity for use in implementing application-specific accelerators, thereby ...

Ieee2016

Micro-architectural Analysis of In-memory OLTP

Anastasia Ailamaki, Pinar Tözün, Danica Porobic, Utku Sirin

Micro-architectural behavior of traditional disk-based online transaction processing (OLTP) systems has been investigated extensively over the past couple of decades. Results show that traditional OLTP mostly under-utilize the available micro-architectural ...

2016

Instruction Set Extensions for Secure Applications

Paolo Ienne, Francesco Regazzoni

The main goal of this paper is to expose the community to past achievements and future possible uses of Instruction Set Extension (ISE) in security applications. Processor customization has proven to be an effective way for achieving high performance with ...

Ieee2016

HRL: Efficient and Flexible Reconfigurable Logic for Near-Data Processing

Christos Kozyrakis

The energy constraints due to the end of Dennard scaling, the popularity of in-memory analytics, and the advances in 3D integration technology have led to renewed interest in near-data processing (NDP) architectures that move processing closer to main memo ...

Ieee2016

The EPFL Combinational Benchmark Suite

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

In this paper, we present the EPFL combinational benchmark suite. We aim at completing existing benchmark suites by focusing only on natively combinational benchmarks. The EPFL combinational benchmark suite consists of 23 combinational circuits desi ...

2015